High-voltage isolation
quality and reliability
for AMC130x
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Tom Bonifield
HV Isolation Team
Analog Technology Development Department
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Texas Instruments
/isolation
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Introduction
Isolation products prevent DC and unwanted AC currents between two parts of a system, while allowing signal and power transfer. TI’s AMC130x product family is the first generation that is rated for reinforced isolation, i.e., it provides reliability, shock protection and isolation equivalent to two levels of basic isolation in a single package.
High-voltage isolation technology
High-voltage (HV) isolation is achieved using two thick SiO2 capacitors in ries—one on each side of the isolation barrier. SiO2 is an excellent dielectric with the highest dielectric strength among materials commonly ud for HV isolation components and, unlike polyimide and other polymer-bad insulators, SiO2 is void free and the reliability of an SiO2-insulated capacitor does not degrade with
exposure to ambient moisture.
Table 1: Common insulators ud for HV Isolation The HV caps are manufactured in a high-performance analog CMOS process and packaged in a multi-chip SOIC module. The wafer fab process is a multiple-level metal process with the HV capacitor formed between metals as shown in Figure 1. This structure achieves the SiO2 thickness needed for HV isolation simply by using standard interlevel dielectric layers. This multi-layered structure improves quality and reliability by reducing the dependence of the HV performance on any single layer.Manufacturing of the HV capacitors us the same process and equipment that are ud for high-volume Analog and CMOS production. The SiO2 films are amorphous and homogeneous, and are deposited by Plasma-Enhanced Chemical Vapor Deposition. Each SiO2 layer is planarized using Chemical Mechanical Polishing. The final SiO2 film thickness are measured and controlled during process. Using multiple layers reduces dielectric thickness variability for a well-controlled total capacitor dielectric thickness, which is verified
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by a wafer-level capacitance measurement prior
to asmbly.
火车英语怎么说An AMC130x multi-chip module using this isolation capacitor technology combined with high-performance analog circuits is shown in Figure 2 on the following page. Both the transmitter and receiver have isolation capacitors to double the high-voltage capability compared to a single capacitor. The die-to-die bond wires’ loop heights are controlled for compatibility with HV. A very thick multilayer passivation of planarized
Figure 1: HV capacitor illustration.
SiO 2, SiON and polyimide protects the HV isolation die from possible breakdown in the mold compound surrounding the die.
Products using this configuration meet the industry standard requirements for reinforced isolation, in
cluding:
V IOTM = 5.0 kVrms transient overvoltage V IORM =
1.0 kVrms 20 yrs reinforced iso working voltage
Surge > 10 kV peak
High-voltage isolation testing
Multiple component-level as well as system- and end-equipment-level standards govern and certify isolation products. Bad on real-world operating conditions, various voltage stress profiles are mandated for isolation products which quantify their HV isolation performance.[1]
Some of the component-level parameters are working voltage (V IOWM ), maximum transient isolation voltage (V IOTM ), isolation withstand voltage (V ISO ), maximum repetitive peak voltage (V IORM ) and maximum surge isolation voltage (V IOSM ). The parameters and the
仓库6s管理内容tests which are ud to verify the capabilities are
listed in Table 2.Table 2: HV tests
Routine high-voltage production testing on every part follows Method-B1 as prescribed by IEC 60747-5-5. Method-B1 test conditions are shown in Figure 3. This test has two parts: an
isolation test and a partial discharge test. The isolation test is an HV leakage test for 1 c (t st1) at a stress voltage V ini,b ³ 120% of V IOTM or V ISO . This part of the test screens out units with defective HV capacitors. The cond part of Method-B1 is a 1-c partial discharge test at “V m ” which is ³ 1.875× V IORM for reinforced isolation. The partial discharge test screens out units with electrically active voids in the mold compound.
RTB (Ramp-to-Breakdown) test is a destructive test performed on a sample basis as shown in
Figure 4. The RTB data show a tight distribution
Figure 2: AMC1305 High-voltage isolation multi-chip module with HV capacitors on transmitter and receiver connected in ries.
Figure 3: Method-B1 routine production test performed on all parts
of breakdown voltages with high margin to the Method-B1 leakage test at ³ 6 kVrms for 1 c.
Time Dependent Dielectric Breakdown (TDDB) is the standard test method to verify the lifetime of any dielectric [2], [3], [4]. It is a key test of the high-voltage isolation barrier. TDDB can be performed on final packaged product parts becau the isolation insulator is directly accessible by testing between the two isolated voltage domains. TDDB is performed by stressing parts at a constant high
AC or DC voltage for a long time until the insulator wears out and fails by electrical short. By testing TDDB at multiple voltages, the product lifetime at the working voltage is determined by extrapolation as shown in Figure 5.
The breakdown times at each TDDB test voltage are analyzed by the Weibull method to determine an average fail time t 63% and extrapolation to 1 ppm failure probability. The TDDB breakdown times follow the commonly ud model:
Time-to-fail = A * exp (–g * E)
where g is the field acceleration factor and E is electric field.
Margins for establishing the lifetime of a reinforced isolation part using HV capacitors, such as AMC130x, are covered in VDE884-11 spec. The include 20% margin in working voltage and 87.5% margin in lifetime; i.e., a 1 kVrms working voltage with 20-year lifetime must demonstrate < 1 ppm failure probability at 1.2 kVrms for 37.5 years. Figure 5 demonstrates a good fit to the model an
d very high isolation barrier lifetimes for this technology at the maximum u condition or working voltage (V IORM , V IOWM ) of 1.0 kVrms.Method-A test is prescribed by IEC to directly confirm V IOTM on a sample basis. Method-A test includes a 60-c leakage test at V IOTM , which is 5.0 kVrms for this technology. TDDB is the best means to determine the quality of the actual distributions relative to the V IOTM spec. Figure 5 shows the average time to breakdown is over 5 orders of magnitude higher than V IOTM .
Surge is an IEC sample test to check immunity
to very high voltage, very short time events (such as lightning strikes). The surge pul waveform is specified by IEC 61000-4-5, as shown in Figure 6. Reinforced isolation requires passing a surge test with a minimum of 50 puls of 10 kV peak voltage.
Histogram –RTB_kVrms
R o w c o u n t
RTB_kVrms (14 bins)
Figure 4: RTB voltage distribution, with1kVrms/c ramp rate
AC Stress Voltage (V )
rms Figure 5: Time Dependent Dielectric Breakdown (TDDB). Circles are the time for 63% of units to break down. The triangle is on-going TDDB testing at 4 kVrms with no units failed as of 17,000 hours
Surge testing is performed periodically on production samples to verify they meet the requirement for reinforced isolation.
To asss the actual surge capability, the surge fail rate is measured as a function of the surge peak voltage. Many units are tested at each voltage. Two different surge test methods are assd: “unipolar” where all puls are in the same polarity, and “bipolar” where half of the puls are one polarity and the other half are the opposite polarity.
The actual surge breakpoint distributions are shown
in Figure 7.
Both “unipolar” and “bipolar” surge breakpoints exceed the 10 kV surge requirement for reinforced isolation. The lower surge breakpoints for “bipolar” surge are a temporary hysteresis effect. The “unipolar” surge distribution is reprentative of single surge events.
Conclusion
The AMC130x family of products has high-voltage capability that exceeds the requirements for reinforced isolation. The quality of HV isolation is demonstrated by substantial margins using statistical test methods. The reliability of the AMC130x HV isolation system is proven with high margin by TDDB, which is the industry standard method of proving lifetime at u conditions.
References
[1] H igh-voltage reinforced isolation: Definitions and
test methodologies: /lit/wp/slyy063/slyy063.pdf .[2] J . W. McPherson, “Time dependent dielectric
breakdown physics—Models revisited,” in
Microelectronics Reliability 52, 2012, p. 1753–1760.[3] I . C. Chen, E. Holland, and C. A. Hu, “A
quantitative physical model for time-dependent breakdown in SiO 2,” in Proc. Int. Reliab. Phys. Symp., 1985, p. 24.[4] J . W. McPherson, V . Reddy, K. Banerjee,
and L. Huy, “Comparison of E and 1/E TDDB models for SiO 2 under long-term/low-field test conditions,” in IEDM Tech. Dig., 1998, p. 171.
U [v]
Figure 6: Surge test waveform
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60%50%40%30%20%10%0%
10
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Surge Test Voltage, kVpk
S u r g e T e s t F a i l s
Figure 7: Surge breakpoint statistical asssment, by both “unipolar” and “bipolar” surge test methods
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