CAUTION: The devices are nsitive to electrostatic discharge; follow proper IC Handling Procedures.CD4536BMS
CMOS Programmable Timer
Description
CD4536BMS is a programmable timer consisting of 24 ripple binary counter stages. The salient feature of this device is its flexibility. The device can count from 1 to 224 or the first 8stages can be bypasd to allow an output, lectable by a 4-bit code, from any one of the remaining 16 stages. It can be driven by an external clock or an RC oscillator that can be constructed using on-chip components. Input IN1 rves as either the external clock input or the input to the on-chip RC oscillator. OUT1 and OUT2 are connection terminals for the external RC components. In addition, an on-chip monostable circuit is provided to allow a variable pul width output. Var-ious timing functions can be achieved using combinations of the capabilities.
A logic 1 on the 8-BYPASS input enables a bypass of the first 8 stages and makes stage 9 the first counter stage of the last 16 stages. Selection of 1 of 16 outputs is accom-plished by the decoder and the BCD inputs A, B, C and D.MONO IN is the timing input for the on-chip monostable oscillator. Groun
ding of the MONO IN terminal through a resistor of 10k Ω or higher, disables the one-shot circuit and connects the decoder directly to the DECODE OUT terminal.A resistor to VDD and a capacitor to ground from the MONO IN terminal enables the one-shot circuit and controls its pul width.
A fast test mode is enabled by a logic 1 on 8-BYPASS, SET,and RESET. This mode divides the 24-stage counter into three 8-stage ctions to facilitate a fast test quence.The CD4536BMS is supplied in the 16-lead outline packages:Braze Seal DIP H4X Frit Seal DIP
H1F Ceramic Flatpack
H6W
Features
•High Voltage Type (20V Rating)
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•24 Flip-Flop Stage - Counts from 20 to 224•Last 16 Stages Selectable by BCD Select Code •Bypass Input Allows Bypassing First 8 Stages •On-Chip RC Oscillator Provision •Clock Inhibit Input
•Schmitt Trigger in clock Line Permits Operation with Very Long Ri and Fall Times •On-Chip Mono
stable Output Provision •Typical fCL = 3MHz at VDD = 10V •Test Mode Allows Fast Test Sequence •Set and Ret Inputs
•Capable of Driving Two Low Power TTL Loads, One Lower Power Schottky Load, or Two HTL Loads Over the Rated Temperature Range •100% Tested for Quiescent Current at 20V •5V, 10V and 15V Parametric Ratings
•Standardized, Symmetrical Output Characteristics •Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”
December 1992
File Number
3345
Pinout
CD4536BMS TOP VIEW
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14151691312111012345
768
SET RESET IN 1OUT 1OUT 2
8-BYPASS VSS
CLOCK INHIBIT
VDD OSC INHIBIT DECODE OUT D C B A
MONO IN BINARY SELECT
Functional Diagram
OSC 14
691011121215
A
B C D BINARY SELECT
8-BYPASS
INHIBIT
CLOCK INHIBIT SET RESET MONO IN
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3
RS
4
5
OUT 1OUT 2RT
13DECODE
OUT
IN 1
VSS = 8VDD = 16
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . .-0.5V to +20V (Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range. . . . . . . . . . . . . . . .-55o C to +125o C Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . .-65o C to +150o C Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . .+265o C At Distance 1/16 ± 1/32 Inch (1.59mm± 0.79mm) from ca for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . .θjaθjc Ceramic DIP and FRIT Package. . . . .80o C/W20o C/W Flatpack Package . . . . . . . . . . . . . . . .70o C/W20o C/W Maximum Package Power Dissipation (PD) at +125o C
For T A = -55o C to +100o C (Package Type D, F, K) . . . . . .500mW For T A = +100o C to +125o C (
Package Type D, F, K). . . . . .Derate
Linearity at 12mW/o C to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . .100mW For T A = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175o C
TABLE1.DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS(NOTE 1)防溺水安全教育教案
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITS
MIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND1+25o C-10µA
2+125o C-1000µA助人为乐图片
VDD = 18V, VIN = VDD or GND3-55o C-10µA Input Leakage Current IIL VIN = VDD or GND VDD = 201+25o C-100-nA
2+125o C-1000-nA
VDD = 18V3-55o C-100-nA Input Leakage Current IIH VIN = VDD or GND VDD = 201+25o C-100nA
2+125o C-1000nA
VDD = 18V3-55o C-100nA Output Voltage VOL15VDD = 15V, No Load1, 2, 3+25o C, +125o C, -55o C-50mV Output Voltage VOH15VDD = 15V, No Load (Note 3)1, 2, 3+25o C, +125o C, -55o C14.95-V Output Current (Sink)IOL5VDD = 5V, VOUT = 0.4V1+25o C0.53-mA Output Current (Sink)IOL10VDD = 10V, VOUT = 0.5V1+25o C 1.4-mA Output Current (Sink)IOL15VDD = 15V, VOUT = 1.5V1+25o C 3.5-mA Output Current (Source)IOH5A VDD = 5V, VOUT = 4.6V1+25o C--0.53mA Output Current (Source)IOH5B VDD = 5V, VOUT = 2.5V1+25o C--1.8mA Output Current (Source)IOH10VDD = 10V, VOUT = 9.5V1+25o C--1.4mA Output Current (Source)IOH15VDD = 15V, VOUT = 13.5V1+25o C--3.5mA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA1+25o C-2.8-0.7V P Threshold Voltage VPTH VSS = 0V, IDD = 10µA1+25o C0.7 2.8V
Functional F VDD = 2.8V, VIN = VDD or GND7+25o C VOH >
VDD/2VOL <
VDD/2
V
VDD = 20V, VIN = VDD or GND7+25o C
VDD = 18V, VIN = VDD or GND8A+125o C
VDD = 3V, VIN = VDD or GND8B-55o C
Input Voltage Low
(Note 2)
VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V1, 2, 3+25o C, +125o C, -55o C- 1.5V
Input Voltage High
(Note 2)
VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V1, 2, 3+25o C, +125o C, -55o C 3.5-V
Input Voltage Low (Note 2)VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3+25o C, +125o C, -55o C-4V
Input Voltage High (Note 2)VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3+25o C, +125o C, -55o C11-V
NOTES: 1.All voltages referenced to device GND, 100% testing being implemented.
2.Go/No Go test with limits applied to inputs.
3.For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
TABLE2.AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS(NOTE 1, 2)
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITS
MIN MAX
Propagation Delay Clock to Q1 8-Bypass High TPHL1
TPLH1
VDD = 5V, VIN = VDD or GND9+25o C-2000ns
10, 11+125o C, -55o C-2700ns
Propagation Delay Clock to Q1 8-Bypass Low TPHL2
TPLH2
VDD = 5V, VIN = VDD or GND9+25o C-5000ns
10, 11+125o C, -55o C-6750ns
Propagation Delay Clock to Q16TPHL3
TPLH3
VDD = 5V, VIN = VDD or GND9+25o C-8000ns
10, 11+125o C, -55o C-10800ns
Propagation Delay Ret to QN TPHL4VDD = 5V, VIN = VDD or GND9+25o C-6000ns
10, 11+125o C, -55o C-8100ns
Transition Time TTHL
TTLH VDD = 5V, VIN = VDD or GND9+25o C-200ns
10, 11+125o C, -55o C-270ns
Maximum Clock Input Frequency FCL VDD = 5V, VIN = VDD or GND9+25o C.5-MHz
10, 11+125o C, -55o C.37-MHz
NOTES:
1.VDD = 5V, CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2.-55o C and +125o C limits guaranteed, 100% testing being implemented.
TABLE3.ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITS MIN MAX
Supply Current IDD VDD = 5V, VIN = VDD or GND1, 2-55o C, +25o C-5µA
+125o C-150µA
VDD = 10V, VIN = VDD or GND1, 2-55o C, +25o C-10µA
+125o C-300µA
VDD = 15V, VIN = VDD or GND1, 2-55o C, +25o C-10µA
+125o C-600µA Output Voltage VOL VDD = 5V, No Load1, 2+25o C, +125o C, -
55o C
-50mV
Output Voltage VOL VDD = 10V, No Load1, 2+25o C, +125o C, -
55o C
-
50mV
Output Voltage VOH VDD = 5V, No Load1, 2+25o C, +125o C, -
55o C
4.95-V
Output Voltage VOH VDD = 10V, No Load1, 2+25o C, +125o C, -
55o C
9.95-V Output Current (Sink)IOL5VDD = 5V, VOUT = 0.4V1, 2+125o C0.36-mA
-55o C0.64-mA Output Current (Sink)IOL10VDD = 10V, VOUT = 0.5V1, 2+125o C0.9-mA阿昔洛韦片说明书
-55o C 1.6-mA Output Current (Sink)IOL15VDD = 15V, VOUT = 1.5V1, 2+125o C 2.4-mA
-55o C 4.2-mA Output Current (Source)IOH5A VDD = 5V, VOUT = 4.6V1, 2+125o C--0.36mA
-55o C--0.64mA Output Current (Source)IOH5B VDD = 5V, VOUT = 2.5V1, 2+125o C--1.15mA
-
55o C--2.0mA Output Current (Source)IOH10VDD = 10V, VOUT = 9.5V1, 2+125o C--0.9mA
-55o C--1.6mA
Output Current (Source)
IOH15
VDD =15V, VOUT = 13.5V
1, 2
+125o C --2.4mA -55o C
--4.2mA Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2+25o C, +125o C, -55o C -3V Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2+25o C, +125o C, -55o C
+7-V Propagation Delay
Clock to Q1 8-Bypass High TPHL1TPLH1VDD = 10V 1, 2, 3+25o C -1000ns VDD = 15V 1, 2, 3+25o C -700ns Propagation Delay
Clock to Q1 8-Bypass Low TPHL2TPLH2VDD = 10V 1, 2, 3+25o C -1600ns VDD = 15V 1, 2, 3+25o C -1200ns Propagation Delay Clock to Q16TPHL3TPLH3VDD = 10V 1, 2, 3+25o C -3000ns VDD = 15V 1, 2, 3+25o C -2000ns
Propagation Delay Qn to Qn+1
TPHL TPLH
VDD = 5V 1, 2, 3+25o C -300VDD = 10V 1, 2, 3+25o C -150VDD = 15V
1, 2, 3+25o C -100Propagation Delay Set to Qn
未老莫还乡TPLH
VDD = 5V 1, 2, 3+25o C -600VDD = 10V 1, 2, 3+25o C -250VDD = 15V
1, 2, 3+25o C -160Propagation Delay Ret to Qn TPHL4
VDD = 10V 1, 2, 3+25o C -2000ns VDD = 15V
1, 2, 3+25o C -1500ns Transition Time
TTHL TTLH VDD = 10V 1, 2, 3+25o C -100ns VDD = 15V 1, 2, 3+25o C -80ns Maximum Clock Input Frequency. Unlimited In-put Ri or Fall Time FCL
VDD = 10V 1, 2, 3+25o C 1.5-MHz VDD = 15V
1, 2, 3+25o C 2.5-MHz Minimum Clock Pul Width
TW
VDD = 5V 1, 2, 3+25o C -400ns VDD = 10V 1, 2, 3+25o C -150ns VDD = 15V
1, 2, 3+25o C -100ns Minimum Set Pul Width
TW
VDD = 5V 1, 2, 3+25o C -400ns VDD = 10V 1, 2, 3+25o C -200ns VDD = 15V
1, 2, 3+25o C -120ns Minimum Ret Pul Width
TW
VDD = 5V 1, 2, 3+25o C -6µs VDD = 10V 1, 2, 3+25o C -2µs VDD = 15V
1, 2, 3+25o C - 1.5µs Minimum Set Recovery Time
TREM
VDD = 5V 1, 2, 3+25o C -5µs VDD = 10V 1, 2, 3+25o C -2µs VDD = 15V
1, 2, 3+25o C - 1.6µs Minimum Ret Recov-ery Time
TREM
VDD = 5V 1, 2, 3+25o C -7µs VDD = 10V 1, 2, 3+25o C -3µs VDD = 15V
1, 2, 3+25o C -2µs Input Capacitance CIN
Any Input
1, 2
+25o C
-7.5
pF NOTES:
1.All voltages referenced to device GND.
2.The parameters listed on Table 3 are controlled via design or process and are not directly tested. The parameters are characterized on initial design relea and upon design changes which would affect the characteristics.
3.CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 3.ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER SYMBOL CONDITIONS
NOTES TEMPERATURE
LIMITS
UNITS MIN MAX
TABLE4.POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITS MIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND1, 4+25o C-25µA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA1, 4+25o C-2.8-0.2V N Threshold Voltage
Delta
∆VTN VDD = 10V, ISS = -10µA1, 4+25o C-±1V P Threshold Voltage VTP VSS = 0V, IDD = 10µA1, 4+25o C0.2 2.8V P Threshold Voltage
Delta
∆VTP VSS = 0V, IDD = 10µA1, 4+25o C-±1V
Functional F VDD = 18V, VIN = VDD or GND1+25o C VOH >
VDD/2VOL <
VDD/2
V
VDD = 3V, VIN = VDD or GND
Propagation Delay Time TPHL
TPLH VDD = 5V1, 2, 3, 4+25o C- 1.35 x
+25o C
Limit
ns
NOTES: 1.All voltages referenced to device GND.
2.CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3.See Table 2 for +25o C limit.
4.Read and Record
TABLE5.BURN-IN AND LIFE TEST DELTA PARAMETERS +25o C PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI-2IDD± 1.0µA
Output Current (Sink)IOL5± 20% x Pre-Test Reading Output Current (Source)IOH5A± 20% x Pre-Test Reading
魄散魂飞TABLE6.APPLICABLE SUBGROUPS
CONFORMANCE GROUP MIL-STD-883
METHOD GROUP A SUBGROUPS READ AND RECORD
Initial Test (Pre Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A PDA (Note 1)100% 50041, 7, 9, Deltas
Interim Test 3 (Post Burn-In)100% 50041, 7, 9IDD, IOL5, IOH5A PDA (Note 1)100% 50041, 7, 9, Deltas
Final Test100% 50042, 3, 8A, 8B, 10, 11
Group A Sample 50051, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B Subgroup B-5Sample 50051, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11 Subgroup B-6Sample 50051, 7, 9
Group D Sample 50051, 2, 3, 8A, 8B, 9Subgroups 1, 2 3
NOTE:1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE7.TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS MIL-STD-883
METHOD
TEST READ AND RECORD
PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD
Group E Subgroup 250051, 7, 9Table 41, 9Table 4
