LM2409
Monolithic Triple 9.5ns CRT Driver
General Description
The LM2409is an integrated high voltage CRT driver circuit designed for u in color monitor applications.The IC con-tains three high input impedance,wide band amplifiers which directly drive the RGB cathodes of a CRT.Each chan-nel has its gain internally t to −14and can drive CRT ca-pacitive loads as well as resistive loads prent in other ap-plications,limited only by the package’s power dissipation.The IC is packaged in an industry standard 11-lead TO-220molded plastic power package.See Thermal Considerations ction.
Features
n Dissipates approximately 50%less power than the LM2406
n Well matched with LM1279video preamp n 0V to 5V input range
n Stable with 0pF–20pF capacitive loads and inductive peaking networks
n Convenient TO-220staggered lead package style
n Standard LM240X Family Pinout which is designed for easy PCB layout
带海字的成语Applications
n 1024x 768Displays up to 70Hz Refresh n Pixel clock frequencies up to 75MHz n Monitors using video blanking
Schematic and Connection Diagrams
DS100838-1
FIGURE 1.Simplified Schematic Diagram
(One Channel)
DS100838-2
Note:Tab is at GND
Top View
Order Number LM2409T
August 1999
LM2409Monolithic Triple 9.5ns CRT Driver
©1999National Semiconductor Corporation
Absolute Maximum Ratings (Notes 1,3)
If Military/Aerospace specified devices are required,plea contact the National Semiconductor Sales Office/Distributors for availability and specifications.Supply Voltage,(V CC )+90V Bias Voltage,(V BB )+16V Input Voltage,(V IN )
0V to 6V
Storage Temperature Range,(T STG )−65˚C to +150˚C
Lead Temperature
(Soldering,<10c.)
300˚C ESD Tolerance,Human Body Model
2kV
Machine Model 250V
Operating Range (Note 2)
V CC +60V to +85V
V BB
+8V to +15V V IN
+0V to +5V V OUT
+15V to +75V Ca Temperature −20˚C to +115˚C Do not operate the part without a heat sink.
Electrical Characteristics
(See Figure 2for Test Circuit)
Unless otherwi noted:V CC =+80V,V BB =+12V,V IN =+2.7V DC ,C L =8pF,Output =40V PP at 1MHz,T C =50˚C.Symbol Parameter
Condition
LM2409
Units Min
Typ Max
I CC Supply Current Per Channel,No Input Signal,No Output Load 8mA I BB Bias Current All Three Channels
12mA V OUT DC Output Voltage No AC Input Signal,V IN =1.2V 626568V DC
A V DC Voltage Gain No AC Input Signal
−12
−14−16
∆A V Gain Matching (Note 4),No AC Input Signal 1.0dB LE Linearity Error (Notes 4,5),No AC Input Signal 8%t R Ri Time (Note 6),10%to 90%9ns t F Fall Time (Note 6),90%to 10%11ns OS
Overshoot
(Note 6)
1
%
Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2:Operating ratings indicate conditions for which the device is functional,but do not guarantee specific performance limits.For guaranteed specifications and test conditions,e the Electrical Characteristics.The guaranteed specifications apply only for the test conditions listed.Some perform
ance characteristics may change when the device is not operated under the listed test conditions.
Note 3:All voltages are measured with respect to GND,unless otherwi specified.Note 4:Calculated value from Voltage Gain test on each channel.
Note 5:Linearity Error is the variation in dc gain from V IN =1.0V to V IN =4.5V.Note 6:Input from signal generator:t r ,t f <1ns.
AC Test Circuit
Figure 2shows a typical test circuit for evaluation of the LM2409.This circuit is designed to allow testing of the LM2409in a 50Ωenvironment without the u of an expensive FET probe.The 4950Ωresistor at the output forms a 100:1voltage divider when connected to a 50Ωload.
DS100838-3
Note:8pF load includes parasitic capacitance.
FIGURE 2.Test Circuit (One Channel)
2
好好活着Typical Performance Characteristics(V
CC =80V,V
BB
=12V,C
L
=8pF,V
OUT
=40V
PP
(25V-65V),
Test Circuit-Figure2unless otherwi specified)
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FIGURE3.V OUT vs V IN
DS100838-5 FIGURE4.Speed vs Temperature
DS100838-6 FIGURE5.LM2409Pul Respon
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FIGURE6.Power Dissipation vs Frequency
DS100838-8
FIGURE7.Speed vs Offt
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FIGURE8.Speed vs Load Capacitance
3
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季节的英语怎么读
Theory of Operation
The LM2409is a high voltage monolithic three channel CRT driver suitable for high resolution display applications.The LM2409operates with80V and12V power supplies.The part is houd in the industry standard11-lead TO-220 molded plastic power package.
The circuit diagram of the LM2409is shown in Figure1.The PNP emitter follower,Q5,provides input buffering.Q1and Q2form a fixed gain cascode amplifier with resistors R1and R2tting the gain at−14.Emitter followers Q3and Q4iso-late the high output impedance of the cascode stage from the capacitance of the CRT cathode which decreas the nsitivity of the device to load capacitance.Q6provides bi-asing to the output emitter follower stage to reduce cross-over distortion at low signal levels.
Figure2shows a typical test circuit for evaluation of the LM2409.This circuit is designed to allow testing of the LM2409in a50Ωenvironment without the u of an expen-sive FET probe.In this test circuit,two low inductance resis-tors in ries totaling4.95kΩform a100:1wideband,low capacitance probe when connected to a50Ωcoaxial cable and a50Ωload(such as a50Ωoscilloscope input).The in-put signal from the generator is ac coupled to the ba of Q5.
Application Hints
INTRODUCTION
National Semiconductor(NSC)is committed to provide ap-plication information that assists our customers in obtaining the best performance possible from our products.The follow-ing information is provided in order to support this commit-ment.The reader should be aware that the optimization of performance was done using a specific printed circuit board designed at NSC.Variations in performance can be realized due to physical changes in the printed circuit board and the application.Therefore,the designer should know that com-ponent value changes may be required in order to optimize performance in a given application.The values shown in this document can be ud as a starting point for evaluation pur-pos.When working with high bandwidth circuits,good lay-out practices are also critical to achieving maximum perfor-mance.
IMPORTANT INFORMATION
The LM2409performance is targeted for the VGA(640x 480)to XGA(1024x768,70Hz refresh)resolution market. It is designed to be a replacement for discrete CRT drivers. The application circuits shown in this document to optimize performance and to protect against damage f
rom CRT arc-over are designed specifically for the LM2409.If another member of the LM240X family is ud,plea refer to its datasheet.
POWER SUPPLY BYPASS
Since the LM2409is a wide bandwidth amplifier,proper power supply bypassing is critical for optimum performance. Improper power supply bypassing can result in large over-shoot,ringing or oscillation.A0.01µF capacitor should be connected from the supply pin,V CC,to ground,as clo to the supply and ground pins as is practical.Additionally,a 10µF to100µF electrolytic capacitor should be connected from the supply pin to ground.The electrolytic capacitor should also be placed reasonably clo to the LM2409’s supply and ground pins.A0.1µF capacitor should be con-nected from the bias pin,V BB,to ground,as clo as is prac-tical to the part.
ARC PROTECTION
During normal CRT operation,internal arcing may occasion-ally occur.Spark gaps,in the range of200V,connected from the CRT cathodes to CRT ground will limit the maximum volt-age,but to a value that is much higher than allowable on the LM2409.This fast,high voltage,high energy pul can dam-age the LM2409output stage.The application circuit shown in Figure9is designed to help clamp
the voltage at the out-put of the LM2409to a safe level.The clamp diodes,D1and D2,should have a fast transient respon,high peak current rating,low ries impedance and low shunt capacitance. FDH400or equivalent diodes are recommended.Do not u 1N4148or equivalent diodes for the clamp diodes.D1and D2should have short,low impedance connections to V CC and ground respectively.The cathode of D1should be lo-cated very clo to a parately decoupled bypass capacitor (C3in Figure9).The ground connection of D2and the de-coupling capacitor should be very clo to the LM2409 ground.This will significantly reduce the high frequency volt-age transients that the LM2409would be subjected to during an arcover condition.Resistor R2limits the arcover current that is en by the diodes while R1limits the current into the LM2409as well as the voltage stress at the outputs of the device.R2should be a1/2W solid carbon type resistor.R1 can be a1/4W metal or carbon film type resistor.Having large value resistors for R1and R2would be desirable,but this has the effect of increasing ri and fall times.Inductor L1is critical to reduce the initial high frequency voltage lev-els that the LM2409would be subjected to.The inductor will not only help protect the device but it will also help maximize ri and fall times as well as minimize EMI.For proper arc protection,it is important to not omit any of the arc protection components shown in Figure9.
DS100838-10
繁忙的英语FIGURE9.One Channel of the LM2409with the Recommended Arc Protection Circuit 4
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Application Hints(Continued)
OPTIMIZING TRANSIENT RESPONSE
Referring to Figure9,there are three components(R1,R2 and L1)that can be adjusted to optimize the transient re-spon of the application circuit.Increasing the values of R1 and R2will slow the circuit down while decreasing over-shoot.Increasing the value of L1will speed up the circuit as well as increa overshoot.It is very important to u induc-tors with very high lf-resonant frequencies,preferably above300MHz.Ferrite core inductors from J.W.Miller Mag-netics(part#78FR82K)were ud for optimizing the perfor-mance of the device in the NSC application board.The val-ues shown in Figure9can be ud as a good starting point for the evaluation of the LM2409.The NSC demo board also has a position open to add a resistor in parallel with L1.This resistor can be ud to help control overshoot.Using vari-able resistors for R1and the parallel resistor will simplify finding the values needed for optimum performance in a given application.Once the optimum values are determined the variable resistors can be replaced with fixed values. EFFECT OF LOAD CAPACITANCE
Figure8shows the effect of incread load capacitance on the speed of the device.This demonstrates the importance of knowing the load capacitance in the application. EFFECT OF OFFSET
Figure7shows the variation in ri and fall times when the output offt of the device is varied from40
V DC to50V DC. The ri time shows a maximum variation relative to the cen-ter data point(45V DC)of about21%.The fall time shows a variation of about3%relative to the center data point. THERMAL CONSIDERATIONS
Figure4shows the performance of the LM2409in the test circuit shown in Figure2as a function of ca temperature. The figure shows that the ri time of the LM2409increas by approximately3%as the ca temperature increas from50˚C to100˚C.This corresponds to a speed degrada-tion of0.6%for every10˚C ri in ca temperature.The fall time increas by approximately3%which corresponds to a speed degradation of0.6%for every10˚C ri in ca tem-perature.
Figure6shows the maximum power dissipation of the LM2409vs Frequency when all three channels of the device are driving an8pF load with a40V p-p alternating one pixel on,one pixel off signal.The graph assumes a72%active time(device operating at the specified frequency)which is typical in a monitor application.The other28%of the time the device is assumed to be sitting at the black level(65V in this ca).This graph gives the designer the information needed to determine the heat sink requirement for the appli-cation.The designer should note that if the load capacitance is incread the AC component of the total power dissipation will also increa.
The LM2409ca temperature must be maintained below 115˚C.
If the maximum expected ambient temperature is70˚C and the maximum power dissipation is3.4W(from Figure6,40 MHz bandwidth)then a maximum heat sink thermal resis-tance can be calculated:
This example assumes a capacitive load of8pF and no re-
sistive load.
TYPICAL APPLICATION
A typical application of the LM2409is shown in Figure10.
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Ud in conjunction with an LM1279,a complete video chan-
nel from monitor input to CRT cathode can be achieved.Per-
formance is ideal for1024x768resolution displays with
pixel clock frequencies up to75MHz.Figure10is the sche-
matic for the NSC demonstration board that can be ud to
evaluate the LM1279/2409combination in a monitor.
PC BOARD LAYOUT CONSIDERATIONS
For optimum performance,an adequate ground plane,isola-
tion between channels,good supply bypassing and minimiz-
ing unwanted feedback are necessary.Also,the length of the
signal traces from the preamplifier to the LM2409and from
the LM2409to the CRT cathode should be as short as pos-
sible.The following references are recommended:
Ott,Henry W.,“Noi Reduction Techniques in Electronic
Systems”,John Wiley&Sons,New York,1976.
“Guide to CRT Video Design”,National Semiconductor Appli-
cation Note861.
“Video Amplifier Design for Computer Monitors”,National
Semiconductor Application Note1013.
Pea,Robert A.,“Troubleshooting Analog Circuits”,
Butterworth-Heinemann,1991.
Becau of its high small signal bandwidth,the part may os-
cillate in a monitor if feedback occurs around the video chan-
nel through the chassis wiring.To prevent this,leads to the
video amplifier input circuit should be shielded,and input cir-
cuit wiring should be spaced as far as possible from output
circuit wiring.
NSC DEMONSTRATION BOARD
Figure11shows routing and component placement on the
NSC LM1279/2409demonstration board.The schematic of
the board is shown in Figure10.This board provides a good
example of a layout that can be ud as a guide for future
layouts.Note the location of the following components:
•C55—V CC bypass capacitor,located very clo to pin6 and ground pins
•C43,C44—V BB bypass capacitors,located clo to pin 10and ground
•C53–C55—V CC bypass capacitors,near LM2409and V CC clamp diodes.Very important for arc protection.
The routing of the LM2409outputs to the CRT is very critical
to achieving optimum performance.Figure12shows the
routing and component placement from pin1of the LM2409
to the blue cathode.Note that the components are placed so
that they almost line up from the output pin of the LM2409to
the blue cathode pin of the CRT connector.This is done to
minimize the length of the video path between the two
components.Note also that D14,D15,R29and D13are
placed to minimize the size of the video nodes that they are
酒店好评大全attached to.This minimizes parasitic capacitance in the
video path and also enhances the effectiveness of the pro-
tection diodes.The anode of protection diode D14is con-
nected directly to a ction of the the ground plane that has
a short and direct path to the LM2409ground pins.The cath-
ode of D15is connected to V CC very clo to decoupling ca-
pacitor C55(e Figure12)which is connected to the same
ction of the ground plane as D14.The diode placement
and routing is very important for minimizing the voltage
5
Application Hints
(Continued)
stress on the LM2409during an arc over event.Lastly,notice that S3is placed very clo to the blue cathode and is tied directly to CRT ground.
D S 100838-13
F I
G U R E 10.L M 1279/240X D e m o n s t r a t i o n B o a r d S c h e m a t i c
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