乾隆的母亲是谁Active Miller Clamp
Products with Feature: ACPL-33 J, ACPL-332J Application Note 5314
Introduction
This application note covers the parasitic turn-on effect due to Miller capacitor and how it is mitigated using Active Miller Clamp technique.
One of the common problems faced when operating an IGBT is parasitic turn-on due to Miller capacitor. This effect is noticeable in 0 to +15V type gate driver (single supply driver). Due to this gate-collector coupling, a high dV/dt transient created during IGBT turn-off can induce parasitic turn-on (Gate voltage spike) which is potentially dangerous (Figure 1).
Figure 1. Bottom IGBT Parasitic Turn-On due to Miller Capacitor Parasitic Turn-on via Miller Capacitor:
When turning on the upper IGBT, S1 in a half-bridge, a voltage change dV CE/dt occurs across the lower IGBT, S2.
A current flows through the parasitic Miller capacitor C CG of S1, the gate resistor R GATE and internal
gate resistor, R DRIVER. Figure 1 shows the current flow through the capacitor. This current value can be approximated by the following formula:
dt
好听的英文歌dV
记得我爱你
C
I CE
CG
CG
=
(1)
This current creates a voltage drop across the gate resistor. If this voltage exceeds the IGBT gate threshold voltage, a parasitic turn-on occurs. It should be noted that rising IGBT chip temperature wo
uld lead to a slight reduction of gate threshold voltage.
This parasitic turn-on can also be en on S1 when S2 is turned on.
苹果怎么锁屏
Also due to the additional capacitor, the required driver power is incread and the IGBT shows higher switching loss for the same R GATE .
Negative Power Supply to Increa Threshold Voltage: The usage of negative gate voltage to safely turn-off and block IGBT is typically ud in application with nominal current above 100A. Due to cost, negative gate voltage is often not utilized in IGBT application below 100A. Figure 3 shows a typical circuit using negative supply voltage.
Figure 3. Negative Supply Voltage
Figure 2. Additional capacitor between gate and emitter
There are two classical solution to the above problem; the first being to add a capacitor between gate and emitter (Figure 2). The cond solution is to u negative gate drive (Figure 3).
Additional gate emitter capacitor to shunt the Miller current: The additional capacitor C G between gate and emitter will influence the switching behavior of the IGBT. C G is to take up additional charg
e originating from the Miller capacitance. Due to the fact that the total input capacitance of the IGBT is C G ||C CG , the gate charge necessary to reach the threshold voltage is incread (Figure 2).
Active Miller Clamp Solution
To avoid both efficiency loss due to CG and additional cost for negative supply voltage, another measure to prevent the unwanted IGBT turn-on is propod by shorting the gate to emitter path. This can be achieved by an additional transistor between gate and emitter. This ‘switch’ shorts the gate-emitter region after a threshold is reached. The occurring currents across the Miller capacitance are shunted by the transistor instead of flowing through the output driver pin, Vout (Pin 11). This technique is called Active Miller Clamp.
Figure 4 shows ACPL-332J internal block diagram. Figure 4. ACPL-332J block diagram; Active Miller Clamp feature circled in red How it works: During turn-off, the gate voltage is monitored and clamp output is activated when the gate voltage goes below 2V (relative to V EE). The clamp voltage is typically V OL + 2.5V for a Miller current up to 1100mA.
V
V FAULT
Figure 5. IGBT driver with single power supply, desaturation detection and Active Miller Clamp
Figure 6. IGBT driver with negative gate drive for high power application
Figure 6 shows the driver circuit using negative gate driver for high power application. In such circumstances, the Miller clamp feature would not be required and hence Pin 10 is connected to pin 9, V EE .
Figure 5 to 7 show possible application circuits using our Active Miller Clamp. Application Note: If Active Clamp is not ud, connect V CLAMP to V EE
Figure 5 is the recommended circuit for gate driver design with Miller Clamp (V CLAMP pin).
+ HVDC
-HVDC
AC婴儿为什么吐奶
介意做某事
+ HVDC
-HVDC
AC
Figures 7a and 7b show a dual power supply with external buffer configuration. The external buffer stage is required when the IGBT gate current requirement goes beyond the driver IC. Miller Clamp function is normally not ud when negative voltage supply is provided. However, there are two possible circuit configuration using the clamp pin:
三亚景点排名一览表卤菜怎么做1. U clamp pin as a condary gate discharge path (Figure 7a)
2. U clamp pin to control an additional PNP transistor to sink current. Connecting the Clamp DIRECTLY to the IGBT gate is not advisable for high power IGBT application as the internal clamp MOSFET is only rated up to 1.5A. (Figure 7b)
Figure 7a. Large IGBT driver with negative gate drive, external buffer for high current and Active Clamp as condary gate discharge
Figure 7b. Large IGBT Gate drive with negative gate drive, external buffer for high current and Active Clamp to control condary discharge path for high power application
The Clamp threshold voltage is relative to V EE voltage. If V EE is 0V, the clamp threshold is 2V. In the ca if V EE is -5V, then the clamp threshold is -3V (threshold is 2V relative to the V EE voltage)
For Figure 7, optional resistor R1 may be added to reduce the current drawn from the driver. This will lead to increa turn-on/off time of the IGBT. If not required, R1 should be shorted. Optional resistor R2 can be added to allow both driver and buffer to provide current to the IGBT. R2 can be open circuited to prevent current being drawn from driver to the IGBT.
+ HVDC
-HVDC
AC
+ HVDC
-HVDC
AC
