GENERAL DESCRIPTION
DP2281 is a highly integrated current mode PWM control IC optimized for high performance, low standby power and cost effective offline flyback converter applications.
900泰铢PWM switching frequency at normal operation is internally fixed and is trimmed to tight range. At no load or light load condition, the IC operates in extended burst mode to minimize switching loss, which can achieve less than 75mW standby.
VDD low startup current and low operating current contribute to a reliable power on startup and low sta
ndby design with DP2281.
DP2281 offers comprehensive protections coverage with automatic lf-recovery feature including Cycle-by-Cycle current limiting (OCP), over load protection (OLP), on-chip Thermal Shutdown (OTP), VDD over voltage protection (VDD OVP) and VDD under voltage lockout (UVLO), etc. Excellent EMI performance is achieved with frequency shuffling and soft totem pole gate drive
The tone energy at below 20KHz is minimized in the design and audio noi is eliminated during operation.
DP2281 is offered in SOT23-6 package. FEATURES
火锅鱼
■ Less than 75mW Standby Power at Universal Input
■ Power on Soft Start Reducing MOSFET Vds Stress
■ Frequency Shuffling for EMI
■ Fixed 65KHz Switching Frequency
■ Internal Synchronized Slope Compensation ■ Low VDD Startup Current and Low Operating Current
■ Built-in Leading Edge Blanking
■ On-chip Thermal Shutdown
■ Soft Gate Driver for Good EMI Performance ■ Over Load Protection
■ Cycle-by-Cycle Current Limiting
■ VDD Under Voltage Lockout with Hysteresis (UVLO)
■ VDD OVP & Clamp
APPLICATIONS
Offline AC/DC flyback converter for
■ AC/DC Adapter
■ Open-frame SMPS
TYPICAL APPLICATION
GENERAL INFORMATION
Pin Configuration
The pin map of SOP8 package is shown as below.
GND
FB 1
23
64
NC
ps放大GATE CS
SOT23-6
VDD
5
Ordering Information Part Number Description DP2281 SOT23-6, Pb free in T&R
Package Dissipation Rating Package R θJA (℃/W) SOT23-6
200
Absolute Maximum Ratings Parameter Value VDD Zener Clamp Voltage V DD_Clamp VDD Clamp Continuous
Current
10 mA
CS Input Voltage -0.3 to 7V FB Input Voltage -0.3 to 7V GATE Voltage Range 20V Maximum Operating Junction Temperature T J
150 o
C
Min/Max Storage Temperature T stg
-55 to 150 o
C
Lead Temperature (Soldering, 10cs)
260 o
C
Note: Stress beyond tho listed under “absolute maximum
ratings” may cau permanent damage to the device. The are stress ratings only, functional operation of the device at the or any other conditions beyond tho indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum-rated conditions for extended periods may affect device reliability.
Marking Information
TERMINAL ASSIGNMENTS
Pin Num Pin Name I/O Description 1 GND P Ground.
2 FB I Feedback pin. The loop regulation is achieved by connecting a photo-coupler to this pin. PWM duty cycle is determined by this pin voltage and the current n signal at Pin 4.
3 NC - No connection.
4 CS I Current n input.
5 VDD P Power supply.
6
木地板的好处GATE
O
Totem-pole gate driver output to drive the external MOSFET.
BLOCK DIAGRAM
按图索骥成语故事RECOMMENDED OPERATING CONDITION
Symbol Parameter
Min Max Unit VDD VDD Supply Voltage
11 26 V T A
Operating Ambient Temperature
-40
85
o C
ELECTRICAL CHARACTERISTICS
(T A = 25O
C, VDD=18V if not otherwi noted) Symbol Parameter
Test Conditions Min Typ Max Unit Supply Voltage Section (VDD Pin)
I VDD_st
Start-up current into VDD
pin
2 10 uA I VDD_Op Operation Current V FB =3V,GATE=1nF
1.2 2 mA I VDD_standby Standby Current
0.4
史俞馨1
mA V DD_ON
VDD Under Voltage
Lockout Exit
13.5 14.5 15.5 V V DD_OFF
VDD Under Voltage
Lockout Enter
8.6 9.4 10.2 V V DD_OVP VDD OVP Threshold
27 28.5 30 V V DD_Clamp
VDD Zener Clamp
Voltage
I(V DD ) = 7 mA
30.5
32
33.5
V
Feedback Input Section (FB Pin) V FB_Open FB Open Voltage
4.5
5.4 6 V I FB_Short FB Short Circuit Current Short FB Pin to GND,
Measure Current
0.3 mA
A CS PWM Gain ΔV F
B /ΔV CS
2.0 V/V V skip FB Under Voltage GATE Clock is OFF
1.0 V
V TH_OLP Power Limiting FB Threshold Voltage
3.6 V
T D_OLP
Power Limiting Debounce
Time
43 ms Z FB_IN FB Input Impedance 20 Kohm Current Sen Input Section (CS Pin)
T LEB CS Input Leading Edge Blanking Time
250 ns
V cs(max) Current limiting threshold 0.97 1.0 1.03 V一朵白蔷薇
T D_OCP Over Current Detection
and Control Delay
70 ns
钢琴的声音
Oscillator Section
F OSC Normal Oscillation Frequency
60 65 70 KHz
ΔF(shuffle) /F OSC
Frequency Shuffling Range
-
4 4 %
D MAX Maximum Switching Duty Cycle
66.7 %
F Bust Burst Mode Ba Frequency
22 KHz
On-chip Thermal Shutdown
T SD Thermal Shutdown ---165 -- °C T RC Thermal Recovery 140 -- °C GATE Driver Section (GATE pin)
V OL Output Low Level Igate_sink=20mA 1 V V OH Output High Level Igate_source=20mA 7.5 V V G_clamp Output Clamp Level VDD=24V 16 V T_r Output Rising Time GATE=1nF 150 ns
T_f Output Falling Time GATE=1nF 60 ns
