Application Note AN-4147
Design Guidelines for RCD Snubber of Flyback Converters
Abstract
This article prents some design guidelines for the RCD snubber of flyback converters. When the MOSFET turns off, a high-voltage spike occurs on the drain pin becau of a res-onance between the leakage inductor (L lk) of the main trans-former and the output capacitor (C OSS) of the MOSFET. The excessive voltage on the drain pin may lead to an avalanche breakdown and eventually damage the MOSFET. Therefore, it is necessary to add an additional circuit to clamp the volt-age.
Introduction
One of the most simple topologies is a flyback converter. It is derived from a buck-boost converter by replacing filter inductors with coupled inductors, such as gapped core trans-formers. When the main switch turns on, the energy is stored in the transformer as a flux form and is transferred to output during the main switch off-time. Since the transformer needs to store energy during the main switch on-
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time, the core should be gapped. Since flyback converters need very few components, it is a very popular topology for low- and medium-power applications such as battery chargers, adapt-ers, and DVD players.
Figure 1 shows a flyback converter operating in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) with veral parasitic components, such as pri-mary and condary leakage inductors, an output capacitor of MOSFET, and a junction capacitor of a condary diode.
Figure 1. Flyback Converter; (a) Configuration with Parasitic Components, (b) CCM Operation, (c) DCM Operation
When the MOSFET turns off, the primary current (i d) charges C OSS of the MOSFET in a short time. When the voltage across C OSS (V ds) exceeds the input voltage plus reflected output voltage (V in+nV o), the condary diode turns on, so that the voltage across the magnetizing inductor (L m) is clamped to nV o. There is, therefore, a resonance between L lk1 and C OSS with high-frequency and high-volt-age surge. This excessive voltage on the MOSFET may cau failure. In the ca of the CCM operation, the cond-ary diode remains turned on until the MOSFET is gated on. When the MOSFET turns on, a rever recovery current of the condary diode is added to the primary current, and there is a large current surge on the primary current at the turn-on instance. Meanwhile, since the condary current runs dry before the end of one switching period in the ca of the DCM operation, there is a resonance between L m and C OSS of the MOSFET.
Snubber design
The excessive voltage due to resonance between L lk1 and C OSS should be suppresd to an acceptable level by an addi-tional circuit to protect the main switch. The RCD snubber circuit and key waveforms are shown in Figures 2 and 3. The
RCD snubber circuit absorbs the current in the leakage inductor by turning on the snubber diode (D sn) when V ds exceeds V in+nV o. It is assumed that the snubber capacitance is large enough that its voltage does not change during one switching period.
When the MOSFET turns off and V ds is charged to V in+nV o, the primary current flows to C sn through the snubber diode (D sn). The condary diode turns on at the same time. There-fore, the voltage across L lk1 is V sn-nV o. The slope of i sn is as follows:
Figure 2. Flyback Converter with RCD Snubber Figure 3. Key Waveforms of t he Flyback Converter with RCD Snubber in DCM Operation
where i sn is the current that flows into the snubber circuit, V sn is the voltage across the snubber capacitor C sn, n is the turns ratio of the main transformer, and L lk1 is the leakage inductance of the main transformer. The time t s is obtained by:
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where i peak is the peak current of the primary current.
The snubber capacitor voltage (V sn) should be determined at the minimum input voltage and full-load condition. Once V sn is determined, the power dissipated in the snubber circuit at the minimum input voltage and full-load condition is obtained by:
where f s is the switching frequency of the flyback converter. V sn should be 2~2.5 times of nV o. Very small V sn results in a vere loss in the snubber circuit, as shown in the above equation.
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On the other hand, since the power consumed in the snubber resistor (R sn) is V sn2/R sn, the resistance is obtained by: The snubber resistor with the proper rated power should be chon bad on the power loss. The maximum ripple of the snubber capacitor voltage is obtained as follows:
In general, 5~10% ripple is reasonable. Therefore, the snub-ber capacitance is calculated using the above equation. When the converter is designed to operate in CCM, the peak drain current, together with the snubber capacitor voltage, decreas as the input voltage increas. The snubber capaci-tor voltage under maximum input voltage and full-load con-dition is obtained as follows:
where f s is the switching frequency of the flyback converter, L lk1 is the primary-side leakage inductance, n is the turns ratio of the transformer, R sn is the snubber resistance, and I peak2 is the primary peak current at the maximum input volt-age and full-load condition. When the converter operates in CCM at the maximum input voltage and full-load condition, the I peak2 is obtained as follows:
When the converter operates in DCM at the maximum input voltage and full-load condition, the I peak2 is obtained by: where P in is the input power, L m is the magnetizing induc-tance of the transformer, and V DC max is the rectified maxi-mum input voltage in DC value.
Verify that the maximum value of V ds is below 90% and 80% of the rated voltage of the MOSFET (BV dss), at the transient period and steady-state period, respectively. The voltage rating of the snubber diode should be higher than BV dss. Usually an ultra-fast diode with 1A current rating is ud for the snubber circuit. Example
An adapter using FSDM311 has following specifications: 85V ac to 265V ac input voltage range, 10W output power, 5V output voltage, and 67kHz switching frequency. When the RCD snubber us a 1nF snubber capacitor and 480kΩ snub-ber resistor, Figure 4 shows veral waveforms with 265V ac at the instance of the AC switch turn-on.
Figure 4. Start-up Waveforms with 1nF Snubber Capacitor and 480kΩ Snubber Resistor
In Figures 4-7, Channel 1 through 4 stand for the drain volt-age (V ds, 200V/div), the supply voltage (V CC, 5V/div), the feedback voltage (V fb, 1V/div), and the drain current (I d, 0.2A/div), respectively. The maximum voltage stress on the internal SenFET is around 675V, as shown in Figure 4.
The voltage rating of FSDM311 is 650V, according to the
datasheet. There are two reasons for the excess of the voltage
ratings: the wrong transformer design and/or the wrong
snubber design. Figure 5 shows the reason.
Figure 5. Steady-State Waveforms with 1nF Snubber
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For the reliability, the maximum voltage stress at the steady state should be equal to 80% of the rated voltage (650V * 0.8 = 520V). Figure 5 shows the voltage stress on the internal SenFET is above 570V with V in = 265V ac at steady state. However, the fact that V in+nV o is around 450V (= 375V + 15 * 5V) implies the turns ratio of the transformer is 15, which is a reasonable value. Therefore, the snubber circuit should be redesigned.
Let V sn be twice that of nV o, 150V, and L lk1 and i peak is 150µH and 400mA by measuring, respectively. Obtain the snubber resistance as follows:
高压输电线路The power emission from R sn is calculated as follows:
Let the maximum ripple of the snubber capacitor voltage be 10% and the snubber capacitance is obtained as follows: The results with 14kΩ (3W) and 10nF are shown in Figures 6 and 7.
Figure 6. Start-up Waveforms with 10nF Snubber Capacitor and 14kΩ Snubber Resistor
Figure 7. Steady-State Waveforms with 10nF Snubber Capacitor and 14kΩ Snubber Resistor
The voltage stress on the internal SenFET are 593V and 524V at the startup and steady state, respectively. The are around 91.2% and 80.6% of the rated voltage of FSDM311, respectively.
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(a) are intended for surgical implant into the body, or
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(c) who failure to perform when properly ud in accordance with instructions for u provided in the labeling, can be reasonably expected to result in significant injury to the ur.2.A critical component is any component of a life support device or system who failure to perform can be reasonably expected to
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by Gwan-Bon Koo/ Ph. D
FPS Application Group / Fairchild Semiconductor Phone +82-32-680-1327
Fax +82-32-680-1317
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