TSMC 0.25和0.35um 设计规则

更新时间:2023-05-22 05:42:34 阅读: 评论:0

2 设计规则
2.1    设计规则几何关系定义
Width
Sapcing:
Extension:一几何图形内边界到另一图形外边界长度cereal怎么读
Overlap:一几何图形内边界到另一图形内边界长度
2.2 设计规则
百济韩国语[TSMC_0.35_4M2P_SUBM]    lambda0.2um
[TSMC_0.25_5M1P_DEEP]    lambda0.12um
2.2.1    Well [1.1-1.4]
2014高考试题考雅思的教材
Rule
Description
SUBM
DEEP
什么是hifi
1.1
Minimum width
12
12
1.2
Minimum spacing between wells at different potential
18
18
1.3
Minimum spacing between wells at same potential
6
6
1.4
Minimum spacing between wells of different type
补习英语
0
0
2.2.2    Active [2.1-2.5]
高中英语必背词组
Rule
Description
SUBM
DEEP
2.1
Minimum width
3
3
2.2
Minimum spacing
3
3
2.3
Source/drain active to well edge
6
6
2.4
jennifer lawrenceSubstrate/well contact active to well edge
3
3
zyz2.5
Minimum spacing between active of different implant
4
4
小学生学习方法介绍
 
2.2.3    Thick Active [24.1-24.5]
THICK_ACTIVE is a layer ud for tho process offering two different thickness of gate oxide (typically for the layout of transistors that operate at two different voltage levels). The ACTIVE layer is ud to delineate all the active areas, regardless of gate oxide thickness. THICK_ACTIVE is ud to to mark tho ACTIV
E areas that will have the thicker gate oxide; ACTIVE areas outside THICK_ACTIVE will have the thinner gate oxide.

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