spellcraft专利名称：CONTROLLER WITH PRIORITY
发明人：AIISO HIDEO,KUMADA ICHIRO,YAMAZAKI ISAMU,SATO TAI
申请号：JP2052280
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dailyroutine申请日：19800222
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公开号：JPS5911142B2
公开日：
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19840313
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专利内容由知识产权出版社提供
摘要：PURPOSE:To reduce the time required for the determination of priority, by providing the priority determining circuit which determines the priority of right using common resouce with each device with scattering. CONSTITUTION:Data processing units (PU) 1301-13064 u a common memory unit, not shown, in time-sharing. PUs 1301-13064 produce request signals REQ1- REQ64 when the common memory device is desired to be ud and receive acknowledgement signals ACK1-ACK64. Priority determining circuits (unit) 1401-14064 are provided corresponding to PUs 1301-13064 to supply REQ1-REQ64. Synchronizing signal SYNC is fed from the synchronizing signal generator 150 to the units 1401-14064. Since the ACK signal is output to the units 1401-14064 according to the REQ signal distributed on the binary interrupting line 160 connected to the discrimination line, the time required for judgement can be reduced.time bomb
keyboardspeed97i申请人：KUMADA ICHIRO,AIISO HIDEO,TOKYO SHIBAURA DENKI KK
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