Electrically pumped hybrid AlGaInAs-silicon
evanescent lar
Alexander W. Fang1, Hyundai Park1, Oded Cohen3, Richard Jones2, Mario J. Paniccia2,
power bankand John E. Bowers1
1University of California, Santa Barbara, Department of Electrical and Computer Engineering, Santa Barbara, CA
93106, USA
2Intel Corporation, 2200 Mission College Blvd, SC12-326, Santa Clara, California 95054, USA
3Intel Corporation, S.B.I. Park Har Hotzvim, Jerusalem, 91031, Israel
awfang@engr.ucsb.edu
Abstract: An electrically pumped light source on silicon is a key element
needed for photonic integrated circuits on silicon. Here we report an
electrically pumped AlGaInAs-silicon evanescent lar architecture where
the lar cavity is defined solely by the silicon waveguide and needs no
critical alignment to the III-V active material during fabrication via wafer
bonding. This lar runs continuous-wave (c.w.) with a threshold of 65
mA, a maximum output power of 1.8 mW with a differential quantum
efficiency of 12.7 % and a maximum operating temperature of 40 °C. This
approach allows for 100’s of lars to be fabricated in one bonding step,
making it suitable for high volume, low-cost, integration. By varying the
silicon waveguide dimensions and the composition of the III-V layer, this
architecture can be extended to fabricate other active devices on silicon such
as optical amplifiers, modulators and photo-detectors.
©2006 Optical Society of America
OCIS codes: (140.5960) Semiconductor lars; (250.5300) Photonic integrated circuits. References and links
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1. Introduction
Silicon bad optoelectronic integration offers the promi of low-cost solutions for optical communications and interconnects [1-4]. While there have been many advances in silicon optoelect
ronic device performance [5], [6], a room temperature electrically pumped, silicon lar is one of the last hurdles holding back large scale optical integration onto a silicon platform. Many approaches to light emission and amplification in silicon have been demonstrated including Raman lars [7, 8] and amplifiers [9], nano-patterning [10], nanocrystalline-Si structures [11-13], and doping silicon rich oxides with rare earths [14]. All of the demonstrations, however, have been limited to optical pumping and/or operation at cryogenic temperatures. Alternatively III-V lars may be coupled to silicon waveguides, so called hybrid integration. This may be done using flip-chip bonding [15, 16], lf asmbly [17] or vertical coupling of membrane type devices [18]. All of the approaches have the same deficit in that two devices of different dimensions and/or materials have to be aligned to sub-micron precision to enable efficient coupling.
Although the cost of a silicon photonic circuit may be small, aligning a pre-fabricated lar chip to a planar optical circuit is time consuming and expensive, and drives up the cost of the final asmbled and packaged device. Conventionally, individual lar die are fabricated, diced, placed onto the silicon chip, and then aligned to the waveguide, in a time-consuming and costly process [19]. The lar die can either be actively aligned to the waveguide or mechanical stops can be ud to passively align the lar to the silicon waveguide [15, 16]. The placement of individual lars is expe
nsive, time consuming, and not optimal for high volume manufacturing. A more promising approach has been prented by Hattori et al. [20] where they fabricate membrane III-V disk lars vertically coupled to a passive silicon waveguide. This configuration eas the alignment tolerance to 2-dimensions but coupling is still limited due to the different materials ud for the lar and the passive waveguide and the authors note that misalignment still caus discrepancies in their measured results.
船期英文Previously we demonstrated an optically pumped silicon evanescent lar [21]. The critical missing element was electrical pumping, so an external pump lar was needed. Here
#74350 - $15.00 USD Received 23 August 2006; revid 13 September 2006; accepted 13 September 2006 (C) 2006 OSA 2 October 2006 / Vol. 14, No. 20 / OPTICS EXPRESS 9204
we demonstrate an electrically driven hybrid AlGaInAs-silicon evanescent lar and architecture where the lar cavity is solely defined by a silicon waveguide, that is wafer bonded to a III-V layer. In addition, we demonstrate the capability of multiple electrically driven lars operating simultaneously, all fabricated with a single bonding step.
The hybrid AlGaInAs-silicon evanescent lar is comprid of an offt multiple quantum well region bonded to silicon waveguides that are fabricated on a silicon-on-insulator wafer, [e Fig. 1(a)]. The optical mode of this lar overlaps both the III-V material and the silicon waveguide. The novelty of this structure is that the optical mode can obtain electrically pumped gain from the III-V region while being guided by the underlying silicon waveguide region. Due to the symmetry of the III-V region in the lateral direction, no alignment step is needed between the III-V wafer and the silicon waveguide prior to bonding. This allows one to produce electrically pumped lar sources on a silicon wafer that are completely lf-aligned to ‘passive’ silicon waveguide ctions, becau both lar waveguide and passive waveguide ctions are defined using the same etch step. This is a key advantage of this evanescent lar approach when compared to conventional discrete lar bonding approaches.
(a)
(b)
Fig. 1. (a).Schematic drawing of the hybrid lar structure with the optical mode superimpod
(b) A scanning electron microscope cross ctional image of a fabricated hybrid AlGaInAs-
silicon evanescent lar.
This approach can be performed at the wafer, partial wafer or die level, depending on the application, providing a solution for large scale optical integration onto a silicon platform. Figure 2 is a schematic of a transmitter module bad on this evanescent approach showing how one could produce multiple, compact evanescent lars of different wavelengths each lf-aligned and coupled to silicon modulators and then all combined together with a silicon multiplexer. This entire transmit module could be fabricated on a single die with the multiple electrically pumped lars fabricated with on single wafer bond. In addition the properties of the optical mode can be tailored from device to device by varying the silicon waveguide width enabling complex photonic integrated systems on a single chip.
#74350 - $15.00 USD Received 23 August 2006; revid 13 September 2006; accepted 13 September 2006 (C) 2006 OSA 2 October 2006 / Vol. 14, No. 20 / OPTICS EXPRESS 9205
Fig. 2. Schematic drawing of an integrated silicon transmitter photonic chip showing multiple
evanescent lars fabricated on a silicon chip, all lf aligned to silicon modulators and
multiplexed to a single output.
2. Device structure and fabrication
bldgThe hybrid AlGaInAs-silicon evanescent lar is fabricated using an AlGaInAs quantum well epitaxial structure that is bonded to a low-loss silicon strip waveguide. The silicon strip waveguide is formed on the (100) surface of an undoped silicon-on-insulator (SOI) substrate with a 2 μm thick buried oxid
e using standard projection photolithography and Cl2/Ar/HBr- bad plasma reactive ion etching. The silicon waveguide was fabricated with a final height of 0.76 μm and width of 2.5 μm resulting in a mode that exists predominantly in the silicon waveguide. The calculated overlap of the optical mode with the silicon waveguides is 75 % while there is a 3 % overlap in the quantum wells.
The III-V epitaxial structure is grown on an InP substrate and is summarized in Table 1. The quantum well active layer is bounded by the parate confinement hetero-structure (SCH) and n-layers. The superlattice region is ud to inhibit the propagation of defects from the bonded layer into the quantum well region [22]. This III-V structure is then transferred to the patterned silicon wafer through low temperature oxygen plasma assisted wafer bonding [23]. The low temperature process consists of a thorough solvent cleaning procedure, and surface treatments with buffered HF for silicon and NH4OH for InP. The samples then undergo an additional surface treatment in an oxygen plasma reactive ion etch chamber. The samples surfaces are placed in physical contact at room temperature and subquently annealed at 300 ºC with an applied pressure of 1.5 MPa for 12 hours.
Table. 1. III-V Epitaxial growth layer structure
#74350 - $15.00 USD Received 23 August 2006; revid 13 September 2006; accepted 13 September 2006 (C) 2006 OSA 2 October 2006 / Vol. 14, No. 20 / OPTICS EXPRESS 9206生菜的英文
inches是什么意思
After InP substrate removal with a mixture of HCl/H2O, 75 µm wide mesas are formed using photolithography and by CH4/H/Ar- bad plasma reactive ion etching through the p-type layers and H3PO4/H2O2 lective wet etching of the quantum well layers to the n-type layers. Ni/AuGe/Ni/Au alloy n-contacts are deposited onto the expod n-type InP layer 38 µm away from the center of the silicon waveguide. 4 µm wide Pd/Ti/Pd/Au p-contacts are then deposited on the center of the mesas.
The p-region on the two sides of the mesa are implanted with protons (H+) which electrically insulates the p-type InP [24] resulting in a ~ 4 micron wide p-type current channel down through the non conductive p-type mesa, preventing lateral current spreading in the p-type mesa. The electrical current flows through the center of the mesa to achieve a large overlap with the optical mode. Ti/Au probe pads are deposited on the top of the mesa. The wafer is then diced and the waveguide facets are polished forming ~ 860 µm long lar cavity. A cross-ctional SEM (Scanning Electron Micrograph) image of the final fabricated hybrid lar is shown in Fig. 1(b).
3. Experiment and results
The lar is driven by applying a positive bias voltage to the top p contact. The lar output from one waveguide facet is collected by a lend single mode fiber and then characterized by using a spectrum analyzer or photodetector while simultaneously imaging the lar mode exiting the opposite facet with an infrared camera. The entire silicon chip is mounted on a TEC controller which allows the operating temperature of the lar to be varied from 0 °C to 80 °C.
Fig. 3. The single sided fiber coupled lar output as a function of drive current for variousecit
operating temperatures.
Figure 3 shows the measured c.w. lar output power from one facet as a function of injected current for various operating temperatures ranging from 15 to 40 °C. As can be en from Fig. 3, the lar threshold is 65 mA with a maximum output power of 1.8 mW at 15 °C. The lar has a 40 °C maximum lasing temperature with a characteristic temperature of 39 K. We have measured lar outputs from both facets and have found that they both have similar output powers and thresholds. Using the measured 6 dB coupling loss from waveguide to fiber, and the fact that light is only collected from one facet, we calculate a differential quantum efficiency of 12.7 %. A 15 cm-1 modal loss was measured using the Hakki-Paoli method in the long wavelength regime [25]. The lar has a threshold voltage of 2 V and a ries resistance of 7.5 ohms. The results are typical of other hybrid lars tested.
#74350 - $15.00 USD Received 23 August 2006; revid 13 September 2006; accepted 13 September 2006 (C) 2006 OSA 2 October 2006 / Vol. 14, No. 20 / OPTICS EXPRESS 9207
