HDSP-210x Series, HDSP-211x Series, HDSP-250x Series
Features
• X stackable (HDSP-21xx)• XY stackable (HDSP-250x)• 128 sharacter ASCII decoder • Programmable functions • 16 ur definable characters
• Multi-level dimming and blanking • TTL compatible CMOS IC • Wave solderable
Applications
• Computer peripherals • Industrial instrumentation • Medical equipment
• Portable data entry devices • Cellular phones
• Telecommunications equipment • Test equipment
Description
The HDSP-210x/-211x/-250x ries of products is ideal for applications where displaying eight or more characters of dot matrix information in an aes-thetically pleasing manner is required. The devices are
8-digit, 5 x 7 dot matrix, alphanumeric displays and are all packaged in a standard 15.24 mm (0.6 inch) 28 pin DIP . The on-board CMOS IC has the ability to decode 128 ASCII characters which are permanently stored in ROM. In addition, 16 programmable symbols may be stored in on- board ROM, allowing considerable flexibility for dis-playing additional symbols and icons. Seven brightness levels provide versatility in adjusting the display intensity and power consumption. The HDSP-210x/-211x/-250x products are designed for standard microprocessor interface techniques. The display and special features are accesd through a bidirectional 8-bit data bus.
Device Selection Guide AlGaAs High Efficiency
Font Height Red
Red
Orange
Yellow
Green
0.2 inches HDSP-2107 HDSP-2112 HDSP-2110 HDSP-2111 HDSP-21130.27 inches
HDSP-2504
just for a momentHDSP-2502
HDSP-2500
HDSP-2501
HDSP-2503
HDSP-210x Series
Eight Character 5 mm and 7 mm Smart Alphanumeric Displays
Data Sheet
ESD WARNING: STANDARD CMOS HANDLING PRECAUTIONS SHOULD BE OBSERVED TO AVOID STATIC DISCHARGE.Absolute Maximum Ratings
Supply Voltage, V DD to Ground [1] -0.3 to 7.0 V Operating Voltage, V DD to Ground [2] 5.5 V
Input Voltage, Any Pin to Ground
-0.3 to V DD +0.3 V Free Air Operating Temperature Range, T A [3] -45°C to +85°C Storage Temperature Range, T S -55°C to +100°C Relative Humidity (non-condensing) 85%
Soldering Temperature
[1.59 mm (0.063 in.) Below Body] Solder Dipping 260°C for 5 cs Wave Soldering
250°C for 3 cs ESD Protection @ 1.5 kΩ, 100 pF
V Z = 4 kV (each pin)
Notes:
1. Maximum Voltage is with no LEDs illuminated.
2. 20 dots ON in all locations at full brightness.
3. Maximum supply voltage is 5.25 V for operation above 70°C.
PIN FUNCTION ASSIGNMENT TABLE
NOTES:
1. DIMENSIONS ARE IN mm (INCHES).
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2. UNLESS OTHERWISE SPECIFIED, TOLERANCE ON ALL DIMENSIONS IS ± 0.25 mm (0.010 INCH).
3. FOR YELLOW AND GREEN DEVICES ONLY.
NOTES:
1. DIMENSIONS ARE IN mm (INCHES).
2. UNLESS OTHERWISE SPECIFIED, TOLERANCE ON ALL DIMENSIONS IS ± 0.25 mm (0.010 INCH).
3. FOR YELLOW AND GREEN DEVICES ONLY.
ASCII Character Set HDSP-210X, HDSP-211X, HDSP-250X Series
Recommended Operating Conditions
Parameter Symbol Minimum Nominal Maximum Units Supply Voltage V DD 4.5 5.0 5.5 V
Electrical Characteristics Over Operating Temperature Range (-45°C to +85°C)
4.5 V < V DD <
5.5 V, unless otherwi specified
T A = 25°C -45°C < T A < + 85°C
itineraryV DD = 5.0 4.5 V < V DD < 5.5 V
Parameter Symbol Typ. Max. Min. Max. Units Test Conditions Input Leakage I IH 1.0 µA V IN = 0 to V DD, (Input without pullup) I IL-1.0 pins CLK, D0-D
A0-A4
Input Current I IPL-11 -18 -30 µA V IN = 0 to V DD, (Input with pullup) pins CLS, RST,
WR, RD, CE, FL I DD Blank I DD (BLK) 0.5 3.0 4.0 mA V IN = V DD
I DD 8 digits I DD(V) 200 255 330 mA “V” on in all 8
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12 dots/character[1,2]locations
I DD 8 digits I DD(#) 300 370 430 mA “#” on in al
新视野大学英语听力
20 dots/character[1,2,3,4] locations Input Voltage High V IH 2.0 V DD V
+0.3
Input Voltage Low V IL GND 0.8 V
-0.3 V
Output Voltage High V OH 2.4 V V DD = 4.5 V,
tenneI OH = -40 µA Output Voltage Low V OL0.4 V V DD = 4.5 V, D0-D7 I OL = 1.6 mA Output Voltage Low V OL0.4 V V DD = 4.5 V, CLK I OL = 40 µA High Level Output I OH-60 mA V DD = 5.0 V Current
Low Level Output I OL50 mA V DD = 5.0 V Current
Thermal Resistance R q J-C15 °C/W
IC Junction-to-Ca
Notes:
1. Average I DD measured at full brightness. See Table 2 in Control Word Section for I DD at lower brightness levels. Peak I DD = 28/15 x I DD (#).
2. Maximum I DD occurs at -55°C.
3. Maximum I DD(#) = 355 mA at V DD = 5.25 V and IC T J = 150°C.
4. Maximum I DD(#) = 375 mA at V DD =
5.5 V and IC T J = 150°C.
Optical Characteristics at 25°C[1]
V DD = 5.0 V at Full Brightness
Luminous Intensity Peak Dominant
Character Average (#) Wavelength Wavelength Part Iv (mcd) l Peak l d Description Number Min. Typ. (nm) (nm) AlGaAs HDSP-2107 8.0 15.0 645 637
-2504
HER HDSP-2112 2.5 7.5 635 626
不出国考托福雅思有用吗-2502
Orange HDSP-2110 2.5 7.5 600 602
-2500
Yellow HDSP-2111 2.5 7.5 583 585
-2501
如何练好普通话
High Performance HDSP-2113 2.5 7.5 568 574 Green -2503
Note:
1. Refers to the initial ca temperature of the device immediately prior to measurement.
AC Timing Characteristics Over Temperature Range (-45°C to +85°C)
4.5 V < V DD <
5.5 V, unless otherwi specified
Reference
gift是什么意思Number Symbol Description Min.[1]Units
1 t ACC Display Access Time
Write 210
Read 230 ns
2 t ACS Address Setup Time to Chip Enable 10 ns
3 t CE Chip Enable Active Time
Write 140
Read 160 ns
4 t ACH Address Hold Time to Chip Enable 20 ns
5 t CER Chip Enable Recovery Time 60 ns
6 t CES Chip Enable Active Prior to Rising Edge of
Write 140
Read 160 ns
7 t CEH Chip Enable Hold Time to Rising Edge of
Read/Write Signal[2,3]0 ns
8 t W Write Active Time 100 ns
9 t WSU Data Write Setup Time 50 ns
10 t WH Data Write Hold Time 20 ns
11 t R Chip Enable Active Prior to Valid Data 160 ns
12 t RD Read Active Prior to Valid Data 75 ns
13 t DF Read Data Float Delay 10 ns
t RC Ret Active Time300 ns Notes:
1. Worst ca values occur at an IC junction temperature of 150°C.
2. For designers who do not need to read from the display, the Read line can be tied to V DD and the Write and Chip Enable lines can be tied to-gether.
3. Changing the logic levels of the Address lines when CE = “0” may cau erroneous data to be entered into the Character RAM, regardless of the logic levels of the WR and RD lines.
小学英语词汇表4. The display must not be accesd until after 3 clock puls (110 µs min. using the internal refresh clock) after the rising edge of the ret line.
