Application Report
SLTA055–FEBRUARY2006
Input and Output Capacitor Selection Jason Arrigo PMP Plug-In Power
ABSTRACT
When designing with switching regulators,application requirements determine how
much input an output capacitance is needed.There are a number of key concerns
which effect your lection.The electrical performance requirements of your design
play a big part in determining the amount of capacitance required.The transient
requirements of your system are very important.The load transient amplitude,voltage
deviation requirements,and capacitor impedance each affects capacitor lection.
mountaineerOther important issues to consider are minimizing PCB area and capacitor cost.
When lecting input and output capacitance each design has specific requirements
which much be addresd.System requirements t hard limits for a design.
Depending on what you are trying to accomplish,the amount and type of capacitance
can vary.
hmmContents
1Input Capacitor Selection (2)
2Output Capacitor Selection (7)
List of Figures
1Input Pul Current vs Duty Cycle (2)
2Input Ripple Voltage Plots (4)
3Multiple POL Modules Example (6)
4Capacitor Impedance Characteristics (7)
5Impedance Limits (8)
在线英语阅读助手
6Regulator Slew Rate Example Circuit (9)
7High Frequency Impedance Plot (10)
1Input Capacitor Selection 1.1
Reduce Input Ripple Voltageclementine
1.2Selecting Input Ceramic Capacitors
0.100.1
0.2
0.30.4
0.50.6
0.7
0.80.9
1.0
0.30.20.50.40.70.60.81.00.9R e c t a n g u l a r P u l s e C u r r e n t
D − Duty Cycle
Input Capacitor Selection
The first objective in lecting input capacitors is to reduce the ripple voltage amplitude en at the i
nput of the module.This reduces the rms ripple current to a level which can be handled by bulk capacitors.Ceramic capacitors placed right at the input of the regulator reduce ripple voltage amplitude.Only ceramics have the extremely low ESR that is needed to reduce the ripple voltage amplitude.The capacitors must be placed clo to the regulator input pins to be effective.Even a few nanohenries of stray inductance in the capacitor current path rais the impedance at the switching frequency to levels that negate their effectiveness.
Large bulk capacitors do not reduce ripple voltage.The ESR of aluminum electrolytics and most tantalums are too high to allow for effective ripple reduction.Large input ripple voltage can cau large amounts of ripple current to flow in the bulk capacitors,causing excessive power dissipation in the ESR parasitic.To reduce the rms current in the bulk capacitors the ripple voltage amplitude must be reduced using ceramic capacitors.As a general rule of thumb,keeping the peak to peak ripple amplitude below 75mV keeps the rms currents in the bulk capacitors within acceptable limits.
潲水Load current,duty cycle,and switching frequency are veral factors which determine the magnitude of the input ripple voltage.
The input ripple voltage amplitude is directly proportional to the output load current.The maximum in
put ripple amplitude occurs at maximum output load.Also,the amplitude of the voltage ripple varies with the duty cycle of the converter.For a single pha buck regulator,the duty cycle is approximately the ratio of output to input dc voltage.A single pha buck regulator reaches its maximum ripple at 50%duty cycle.Figure 1shows the ac rms,dc,and total rms input current vs duty cycle for a single pha buck regulator.The solid curve shows the ac rms ripple amplitude.It reaches a maximum at 50%duty cycle.The chart shows how this magnitude falls off on either side of 50%.The straight solid line shows the average value or dc component as a function of duty cycle.The curved dashed line shows the total rms current,both dc and ac,of the rectangular pul as duty cycle varies.
NOTE:Multipha regulators have multiple humps in the ac rms curve depending on the number of phas.
Figure 1.Input Pul Current vs Duty Cycle
Input and Output Capacitor Selection
2SLTA055–FEBRUARY 2006
1.3Calculating Ceramic Capacitance
C MIN+I OUT dc(1*dc)1000
f SW V P(max)
dc+
V OUT
V IN h
;h+Efficiency
(1)
C MIN+10A0.3(1*0.3)1000
33375mV
+84m F
(2)
Input Capacitor Selection
U Equation1to determine the amount of ceramic capacitance required to reduce the ripple voltage amplitude to acceptable levels:
where
f SW is the switchin
g frequency in kHz
I OUT is the steady state output load current
C MIN(1)is the minimum required ceramic input capacitance inμF
(Some of C MIN is supplied by the module)vigor
V P(max)(2)is the maximum allowed peak-peak ripple voltage
dc is the duty cycle(as defined above)
Notes:(1)The actual capacitance of a ceramic is less than the stated nominal value at a given dc voltage.Make sure the actual value is equal to or greater than the calculated value.
(2)75mVpp is recommended Vpmax.This will yield approximately22mVrms of ripple voltage. Example Ceramic Calculation:
Given:
•V IN=12V
•V OUT=3.3V
•I OUT=10A
•η=90%
fat
•f SW=333kHz
•dc=0.3
The minimum ceramic capacitance required to reduce the ripple voltage to75mVpp is calculated to b
e:
The plots of ripple voltage in Figure2show that the ripple amplitude has been reduced by approximately a factor of four once the calculated ceramic capacitors were added.The75mVpp ripple voltage amplitude goal has been achieved.
t − Time − 1 μs / div t − Time − 1 μs / div
No External Capacitance
5× 22 μF Ceramic Capacitance
Ripple Voltage (100 mV / div)
Ripple Voltage (100 mV / div)
V P(max)+I OUT
dc (1*dc) 1000
f SW C MIN
(3)
aimi—V P(max1)+10 0.3 (0.7) 1000
333 18+350mVpp
V P(max2)+
10 0.3 (0.7) 1000
333 84
+75mVpp
(4)
350mVpp [101mVrms 75mVpp [22mVrms
(5)
101mV ń35m W +2.9A 22mV ń35m W +628mA
(6)
(2.9A )2
35m W +294mW
(0.628A )2
35m W +13.8mW
(7)
1.4Input Inductor
Input Capacitor Selection
Figure 2.Input Ripple Voltage Plots
Re-arranging Equation 2to verify the scope plots:
A
Note:when calculating using C MIN ,u effective capacitance value at operating voltage,18μF,is ud as an effective internal capacitance.
Converting Vpp to Vrms:(Vrms =1/(2×√3)×Vpp)
Ohm’s law can be ud to determine rms ripple current through a 35m ΩESR input bulk capacitor:The above calculations show that by reducing the ripple voltage amplitude the rms ripple current in the bulk input capacitor will be reduced substantially.The rms ripple current has been reduced from 2.9A to 628mA,and is now within the ripple current rating of most electrolytic bulk capacitors.This reduction of rms ripple current greatly reduces the power dissipation and increas the life of the bulk input capacitors.The power dissipation equation below shows how a reduction in the ripple voltage amplitude by a factor of 4.67to 1leads to a 21to 1reduction in power dissipation.Bulk capacitor power dissipation:P =I 2×R
If reflected ripple is a concern,u a small (560nH or less)input inductor.This is the single most effective way to confine ripple currents to the local input bypass caps.An input inductor can reduce the reflected ripple current by an order of magnitude.A single input inductor can be shared by multipl
e modules.
4Input and Output Capacitor Selection
SLTA055–FEBRUARY 2006
1.5Transients and Bulk Capacitors
1.6Example Bulk Capacitor Calculation
D I IN+
V OUT
V IN h
D I OUT
(8)
Input Capacitor Selection
At lower currents,this input inductor can take the form of a power ferrite bead.In a multiple module system,the u of a filter inductor at each module will help contain the noi generated by each module and keep it localized.It is one of the best ways to deal with beat frequencies caud by multiple modules operating at slightly different frequencies.Ensure the inductor current is below its saturation current rating. During transient conditions,the u of an input inductor puts larger demands on input bulk capacitors. Take care when using input inductors as they will affect input capacitor lection.
When output current transients are involved the key point to keep in mind is that the electrons have to come from the input of the regulator.Bulk capacitors control the voltage deviation at the input when the converter is responding to an output load transient.The higher the capacitance,the lower the deviation. Therefore,the size of the input bulk capacitor is determined by the size of the output current transient and the allowable input voltage deviation.
The amplitude of the input voltage deviation during a transient is directly proportional to the load current change.If the magnitude of the transient load current is doubled,the input voltage disturbance is doubled also.
Lower input voltage means higher input currents.The input current scales directly by duty cycle.At lower input voltages the input transient currents will also be higher.To comply with output voltage deviation limits,more input capacitance is required.
Consider a2.5 V output regulator with a10 A transient load.With a12 V input,the ideal duty cycle is
2.5 / 12 = 0.208.The10 A load transient on the output transforms to a2.08 A transient on the input.With a
3.3 V input regulator,the duty cycle is now2.5 / 3.3 = 0.758.The10 A load transient is now a7.58 A input transient.This will cau a larger voltage deviation on the lower voltage supply where the voltage limits are probably tighter.
During a transient,input inductance slows the current slew rate en by the host supply.The u of a filter inductor places more demands on the input bulk capacitors since more of the initial current demand must come from the input capacitors rather than the host supply.The input voltage at the regulator input now es a much higher voltage deviation.In the end,both the input and output capacitors have to be recharged,causing higher peak currents to be demanded from the host supply.
When designing a system consisting of a single POL module,or multiple POL modules that make u of a shared bulk input capacitor bank,the first step is to calculate the magnitude of the input transient current. This is done by calculating the reflected input transient for each POL module’s output transient.
After calculating the individual input transients for each module,add them up to get the total transient current.
When calculating,you must determine the worst ca transient combination of all modules and proceed accordingly.
The magnitude of the input current transient is calculated from Equation8:
where
•ηis efficiency
akb0048 next stage•ΔI OUT is the output transient current
•ΔI IN is the input transient current
•V OUT is the nominal output voltage
•V IN is the nominal input voltage
The efficiency valueηis obtained from the regulator data sheet.U a value from the efficiency curve for the particular output voltage and the highest expected output current.
Total Current 2.774A
I
IN
+
3.312 0.91
3+0.907A 12 V
5 A 8 A I
IN
+
2.512 0.90
4+0.926A I
IN
+
1.212 0.85
8+0.941A C +
1.21 I 2tr L
D V 2
(9)
1.6.1
Calculation
C +
1.21 ǒI TR Ǔ2
L
(D V )
2+
1.21 (
2.774)2 560 10*9
(0.100)2
+521m F
(10)
thumbnails
Input Capacitor Selection
Figure 3shows an example diagram of multiple POL modules sharing a single bank of bulk input
capacitors.The output voltage,output current and output load transient specifications are given.The i
nput transient current is calculated for each POL.Adding the individual input transients,the total calculated input transient current is 2.774A.
Figure 3.Multiple POL Modules Example
The next step is to decide if a ries filter inductor is going to be ud.If using an inductor,pick a value no greater than 560nH.If not using one,u a value of 50nH in the calculation to account for stray inductance in the host supply path and its finite bandwidth.
Next,determine the maximum allowable voltage deviation on the bulk capacitors.This is the maximum allowable dip during the peak transient step that was calculated in step one.The smaller the voltage deviation,the higher the required amount of bulk capacitance.
The following equation calculates the minimum required bulk capacitance.
Note that this equation is an approximation.The value it produces should be considered to be an absolute minimum amount.The exact value will have to be determined through experimentation depending on how well regulated your host supply is.•Assume filter L =560nH
•Assume allowable ΔV is 100mV
•Transient current (Itr)was calculated to be 2.774A
6Input and Output Capacitor Selection
SLTA055–FEBRUARY 2006
