广州留学
UC1825UC2825UC3825
•Compatible with Voltage or Current Mode Topologies
•Practical Operation Switching Frequencies
to 1MHz
•50ns Propagation Delay to Output •High Current Dual Totem Pole Outputs (1.5A Peak)•Wide Bandwidth Error Amplifier
•Fully Latched Logic with Double Pul Suppression •Pul-by-Pul Current Limiting
•Soft Start / Max. Duty Cycle Control
•Under-Voltage Lockout with Hysteresis
•
Low Start Up Current (1.1mA)
The UC1825family of PWM control ICs is optimized for high fre-quency switched mode power supply applications.Particular care was given to minimizing propagation delays through the comparators
and logic circuitry while maximizing bandwidth and slew rate of the error amplifier.This controller is designed for u in either cur-rent-mode or voltage mode systems with the capability for input volt-age feed-forward.Protection circuitry includes a current limit comparator with a 1V
threshold,a TTL compatible shutdown port,and a soft start pin
which will double as a maximum duty cycle clamp.The logic is fully
latched to provide jitter free operation and prohibit multiple puls at an output.An under-voltage lockout ction with 800mV of hysteresis
assures low start up current.During under-voltage lockout,the out-puts are high impedance.
The devices feature totem pole outputs designed to source and sink high peak currents from capacitive loads,such as the gate of a power MOSFET.The on state is designed as a high level.
ask的反义词
High Speed PWM Controller
FEATURES
DESCRIPTION
UC1825 UC2825 UC3825
ABSOLUTE MAXIMUM RATINGS(Note 1)
Supply Voltage (Pins 13, 15). . . . . . . . . . . . . . . . . . . . . . . .30V
Output Current, Source or Sink (Pins 11, 14)
DC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5A
Pul (0.5s). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.0A
Analog Inputs
(Pins 1, 2, 7). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to 7V
(Pin 8, 9). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to 6V
Clock Output Current (Pin 4). . . . . . . . . . . . . . . . . . . . . . .-5mA
Error Amplifier Output Current (Pin 3). . . . . . . . . . . . . . . .5mA
Soft Start Sink Current (Pin 8). . . . . . . . . . . . . . . . . . . . .20mA
Oscillator Charging Current (Pin 5). . . . . . . . . . . . . . . . . .-5mA
Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1W
Storage Temperature Range. . . . . . . . . . . . . .-65°C to +150°C
Lead Temperature (Soldering, 10 conds). . . . . . . . . .300°C
Package Q JA Q JC
DIL-16J80-12028(2)
DIL-16N90(1)45
PLCC-2043-75(1)34
LCC-2070-8020(2)
SOIC-1650-120(1)35 THERMAL RATINGS TABLE
Q
Q
ELECTRICAL CHARACTERISTICS:Unless otherwi stated, the specifications apply for , R T= 3.65k, C T= 1nF,V CC = 15V, -55°C<T A<125°C for the UC1825, –40°C<T A<85°C for the UC2825, and 0°C<T A<70°C for the UC3825, T A=T O.
UC1825
UC3825 PARAMETERS TEST CONDITIONS UC2825
borrow的过去式MIN TOP MAX MIN TOP MAX UNITS Reference Section
Output Voltage T O= 25°C, I O= 1mA 5.05 5.10 5.15 5.00 5.10 5.20V Line Regulation10V <V CC< 30V220220mV Load Regulation1mA < I O< 10mA520520mV Temperature Stability*T MIN< T A<T MAX0.20.40.20.4mV/°C Total Output Variation*Line, Load, Temperature 5.00 5.20 4.95 5.25V Output Noi Voltage*10Hz < f < 10kHz5050µV Long Term Stability*T J= 125°C, 1000hrs.525525mV Short Circuit Current V REF= 0V-15-50-100-15-50-100mA Oscillator Section
Initial Accuracy*T J= 2°C360400440360400440kHz Voltage Stability*10V <V CC< 30V0.220.22% Temperature Stability*T MIN< T A<T MAX55% Total Variation*Line, Temperature340460340460kHz Oscillator Section (cont.)
Clock Out High 3.9 4.5 3.9 4.5V Clock Out Low 2.3 2.9 2.3 2.9V Ramp Peak* 2.6 2.8 3.0 2.6 2.8 3.0V Ramp Valley*0.7 1.0 1.250.7 1.0 1.25V Ramp Valley to Peak* 1.6 1.8 2.0 1.6 1.8 2.0V Error Amplifier Sectionexerci怎么读
Input Offt Voltage1015mV Input Bias Current0.630.63µA Input Offt Current0.110.11µA Open Lo
op Gain1V < V O< 4V60956095dB CMRR 1.5V <V CM< 5.5V75957595dB PSRR10V <V CC< 30V8511085110dB Output Sink Current V PIN3= 1V1 2.51 2.5mA Output Source Current V PIN3= 4V-0.5-1.3-0.5-1.3mA Output High Voltage I PIN3= -0.5mA 4.0 4.7 5.0 4.0 4.7 5.0V Output Low Voltage I PIN3= 1mA00 .5 1.000.5 1.0V Unity Gain Bandwidth*3 5.53 5.5MHz Slew Rate*612612V/µs
UC1825UC3825PARAMETERS TEST CONDITIONS
UC2825MIN TOP MAX
MIN
TOP MAX UNITS PWM Comparator Section Pin 7 Bias Current V PIN 7= 0V -1
-5-1
-5µA Duty Cycle Range
scz080
085%Pin 3 Zero DC Threshold V PIN 7= 0V 1.1
1.25 1.1
1.25V Delay to Output *50805080ns Soft-Start Section Charge Current V PIN 8= 0.5V 3
9
20阿根廷英文
上海培训公司
39
20
µA Discharge Current V PIN 8= 1V 1
1
mA Current Limit / Shutdown Section Pin 9 Bias Current 0 <V PIN 9< 4V 1510µA Current Limit Threshold 0.9 1.0 1.10.9 1.0 1.1V Shutdown Threshold 1.25
2022qs世界大学排名公布1.40 1.55 1.25
1.40 1.55V Delay to Output 50805080ns Output Section Output Low Level I OUT = 20mA
0.250.400.250.40V I OUT = 200mA
1.2
2.2
1.2
2.2
V Output High Level I OUT = -20mA苏州韩语培训
13.013.513.013.5V I OUT = -200mA
12.013.012.0
13.0V Collector Leakage V C = 30V 10050010500µA Ri/Fall Time *CL = 1nF 30603060ns Under-Voltage Lockout Section Start Threshold 8.89.29.68.89.29.6V UVLO Hysteresis
0.4
0.8 1.20.4
0.8 1.2V Supply Current Section Start Up Current V CC = 8V 1.1 2.5 1.1 2.5mA ICC V PIN 1, V PIN 7, V PIN 9= 0V; V PIN 2= 1V
22
33
moutai
22
33
mA
ELECTRICAL CHARACTERISTICS:Unless otherwi stated, the specifications apply for , R T = 3.65k, C T = 1nF,V CC
= 15V, -55°C<T A <125°C for the UC1825, –40°C<T A <85°C for the UC2825, and 0°C<T A <70°C for the UC3825, T A =T J.
UC1825 UC2825 UC3825
High speed circuits demand careful attention to layout and component placement.To assure proper perfor-mance of the UC1825follow the rules:1)U a ground plane.2)Damp or clamp parasitic inductive kick energy from the gate of driven MOSFETs.Do not allow the out-put pins to ring below ground.A ries gate resistor or a shunt1Amp Schottky diode at the output pin will rve this purpo.3)Bypass V CC,V C,and V REF.U0.1µF monolithic ceramic capacitors with low equivalent ries inductance.Allow less than1cm of total lead length for each capacitor between the bypasd pin and the ground plane.4)Treat the timing capacitor,CT,like a bypass ca-pacitor.
Printed Circuit Board Layout Considerations
