MAX366ESA+T中文资料

更新时间:2023-07-19 11:25:22 阅读: 评论:0

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_______________General Description
The MAX366 and MAX367 are multiple, two-terminal circuit protectors.  Placed in ries with signal lines, each two-ter-minal device guards nsitive circuit components against voltages near and beyond the normal supply voltages.The devices are ud at interfaces where nsitive cir-cuits are connected to the external world and could encounter damaging voltages (up to 35V beyond the sup-ply rails) during power-up, power-down, or fault conditions.The MAX366 contains three independent protectors and the MAX367 contains eight.  They can protect analog sig-nals using either unipolar (4.5V to 36V) or bipolar (±2.25V to ±18V) power supplies.  Each protector is symmetrical.Input and output terminals may be freely interchanged.The devices are voltage-nsitive MOSFET transistor arrays that are normally on when power is applied and normally open circuit when power is off.  With ±10V sup-plies, on-resistance is 100Ωmax and leakage is less than 1nA at +25°C.
When signal voltages exceed or are within approximately 1.5V of either power-supply voltage (including when power is off), the two-terminal resistance increas dra-matically, limiting fault current as well as output voltage to nsitive circuits.  The protected side of the switch main-tains the correct polarity and clamps approximately 1.5V below the supply rail.  There are no “glitches” or polarity reversals going into or coming out of a fault condition.
________________________Applications
Process Control Systems Redundant/Backup Systems Hot-Inrtion Boards/Systems ATE Equipment Data-Acquisition Systems Sensitive Instruments
____________________________Features
北京留学网o ±40V Overvoltage Protection o Open Signal Paths with Power Off 100ΩSignal Paths with Power On o 1nA Max Path Leakage at +25°C o 44V Maximum Supply Voltage Rating o Automatic Protection; No Programming or Controls
______________Ordering Information
MAX366/MAX367
Signal-Line Circuit Protectors
________________________________________________________________Maxim Integrated Products 1
___________________________________________________Typical Operating Circuit
Call toll free 1-800-998-8800 for free samples or literature.
19-0326; Rev 0; 12/94
Pin Configurations appear at end of data sheet.
MAX367 available after January 1, 1995.
* Dice are tested at T A = +25°C only.
* Contact factory for availability.
M A X 366/M A X 367
Signal-Line Circuit Protectors 2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
we dELECTRICAL CHARACTERISTICS
(V+ = +15V, V- = -15V, T A = T MIN to T MAX , unless otherwi noted.)
Stress beyond tho listed under “Absolute Maximum Ratings” may cau permanent damage to the device. The are stress ratings only, and functional operation of the device at the or any other conditions beyond tho indicated in the operational ctions of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note 1:Guaranteed, but not tested.
Note 2:See Typical Operating Characteristics curves for fault-free analog signal range at various supply voltages.V+ -0.3V, +44V IN_, OUT_..................................................(V- + 44V), (V+ - 44V)Continuous Current into .±30mA Peak Current into Any Terminal
(puld at 1ms, 10% duty cycle)...................................±70mA Continuous Power Dissipation (T A = +70°C)
8-Pin Plastic DIP (derate 9.09mW/°C above +70°C)....727mW 8-Pin SO (derate 5.88mW/°C above +70°C).................471mW 8-Pin CERDIP (derate 8.00mW/°C above +70°C).........640mW
18-Pin Plastic DIP (derate 11.11mW/°C above +70°C)...889mW 18-Pin Wide SO (derate 9.52mW/°C above +70°C).....762mW 18-Pin CERDIP (derate 10.53mW/°C above +70°C).....842mW Operating Temperature Ranges
MAX36_C_ _........................................................0°C to +70°C MAX36_E_ _......................................................-40°C to +85°C MAX36_M_ _...................................................-55°C to +125°C Storage -65°C to +150°C Lead Temperature (soldering, 10c).............................+300°C
MAX366/MAX367
Signal-Line Circuit Protectors
_______________________________________________________________________________________3
-25
-35
15
25
35
TRANSFER CHARACTERISTICS
(BIPOLAR SUPPLIES)
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INPUT VOLTAGE (V)
O U T P U T  V O L T A G E  (V ),I N P U T  & O U T P U T  C U R R E N T  (µA )
0-15
-55
-15
150-10-5
105
152535
2030TRANSFER CHARACTERISTICS
(SINGLE SUPPLY)
INPUT VOLTAGE (V) V IN  > (V+ - 35V)
O U T P U T  V O L T A G E  (V ),I N P U
T  & O U T P U T  C U R R E N T  (µA )
010515
10
25
20
5
1E+01
1E+021E+031E+041E+051E+06
1E+071E+08-15
15
PATH RESISTANCE vs. INPUT VOLTAGE
(BIPOLAR SUPPLIES)
INPUT VOLTAGE (V)
P A T H  R E S I S T A N C E  (Ω)0
-10
-5
10
5
500
-15
15
PATH RESISTANCE vs. INPUT VOLTAGE
(BIPOLAR SUPPLIES)
400INPUT VOLTAGE (V)
P A T H  R E S I S T A N C E  (Ω)
200100
-10
-5
10
30050
4502501503505
__________________________________________Typical Operating Characteristics
(V+ = +15V, V- = -15V, T A = +25°C, unless otherwi noted.)
M A X 366/M A X 367
spring festival
Signal-Line Circuit Protectors 4_______________________________________________________________________________________
____________________________Typical Operating Characteristics (continued)
(V+ = +15V, V- = -15V, T A = +25°C, unless otherwi noted.)
V+ = 5V,  V- = -5V
CHAN 1: INPUT OVERVOLTAGE RAMP ±7V, 2V/div CHAN 2: OUTPUT; OUTPUT LOAD = 1000Ω, 2V/div
OVERVOLTAGE RAMP
sdl
-10
-8-6-4-201k 10k 100k 1M 10M 100M
100
100
PATH RESISTANCE vs. INPUT VOLTAGE
misjudge(SINGLE SUPPLY)
INPUT VOLTAGE (V)
P A T H  R E S I S T A N C E  (Ω)
10
1fuels
10100
1k 10k 100k 1M 10M 1G
100M 500
100
PATH RESISTANCE vs. INPUT VOLTAGE
(SINGLE SUPPLY)
400
INPUT VOLTAGE (V)
P A T H  R E S I S T A N C E  (Ω)
20010010
1
marryyou30050450250150350
MAX366/MAX367
Signal-Line Circuit Protectors
_______________________________________________________________________________________5
___________Background Information
When a voltage outside the supply range is applied to most integrated circuits, there is a strong possibility they will be damaged or “latch up” (that is, fail to operate prop-erly even after the offending voltage is removed).  If an IC’s input or output pin is supplied with a voltage when the IC’s power is off, and power is subquently applied, the device may act as an SCR and destroy itlf and/or other circuitry.  Such “faults” are commonly encountered in modular control systems where power and signals to inter-connected modules may be interrupted and re-estab-lished at random.  They can happen during production testing, maintenance, start-up, or a power “brownout.”The MAX366/MAX367 are designed to protect delicate input and output circuitry from overvoltage faults up to ±40V (with or without power applied), in devices such as op amps, analog-to-digital/digital-to-analog converters,and voltage references.  The circuit protectors automati-cally limit signal voltages and currents to safe levels with-out degrading normal signal performance, even in very high-impedance circuits.  They are powered by the power supply of the protected circuit and inrted into the signal lines.  There are no control lines, programming pins, or adjustments.
Unlike shunt diode networks, the devices are low-impedance FETs that become high impedance during a fault condition, so fault current and power dissipation are extremely low.  Equally important, leakage current during normal and fault conditions is extremely low.  In addition,unlike most discrete networks, the parts protect circuits both when power is off and during power transitions.
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_______________Detailed Description
Internal Construction
Figure 1 shows the simplified internal construction of each protector inside the MAX366/MAX367.  Each circuit consists of two N-channel FETs and one P-channel FET.All the FETs are enhancement types; that is, the N chan-nels must have approximately 1.3V of positive gate volt-age in order to conduct, and the P channel must have approximately 2V of negative gate voltage in order to conduct.
During normal operation, V+ is connected to a positive potential and V- is connected to a negative potential.Since their gates are tied to V+, transistors Q1 and Q3conduct as long as their sources are at least 1.3V below V+ (the N-channel gate threshold.)  Transistor Q2’s gate is tied to V-, so it conducts as long as its source is 2V or more above V- (the P-channel gate threshold.)
Figure 1.  Simplified Internal Structure
As long as the signal is within the limits, all three tran-sistors conduct and a low-resistance path is maintained from the IN to OUT pin.  (Note that, since the device is symmetrical, IN and OUT pins can be interchanged.)When the signal is beyond the gate threshold of either Q2 or Q1/Q3, the path resistance ris dramatically.When power is off, none of the transistors have gate bias, so the circuit from IN to OUT is open.
Normal Operation
In normal operation, the protector is placed in ries with the signal line and the power supplies are con-nected to V+ and V- (e Figure 2).  V- is ground when operating with a single supply.  When po
wer is applied,each protector acts as a resistor in the signal path.Any voltage source on the “input” side of the switch will be conducted through the protector to the output. (Note that, since the protector is symmetrical, IN and OUT pins can be interchanged.)
If the output load is resistive, it will draw current, and a voltage divider will be formed with the internal resistance so the output voltage will be lower than the input voltage.Since the internal resistance is typically less than 100Ω,high-impedance loads will be relatively unaffected by the prence of the protector.  The protector’s path resis-tance is a function of the supply voltage and the signal voltage (e Typical Operating Characteristics ).
Power Off
When power is off (i.e., V+ = V- = 0V), the protector is a virtual open circuit, and all voltages on each side are isolated from each other up to ±40V.  With ±40V applied to the input pin, the output pin will be 0V, regardless of its resistance to ground.
Fault Conditions
A fault condition exists when the voltage on either sig-nal pin is within about 1.5V of either supply rail
or exceeds either supply rail.  This definition is valid when power is applied and when it is off, as well as during all the states as power ramps up or down.
During a fault, the protector acts as a variable resistor,conducting only enough to sustain the other side of the switch within about 1.5V of the supply rail.  This voltage is known as the “fault knee voltage,” and is not symmet-rical.  It is approximately 1.3V down from the positive supply (V+ pin) or approximately 2.0V up from the neg-ative supply (V- pin).  Each fault knee voltage varies slightly with supply voltage, with output current, and from device to device.
During a fault condition, all the fault current flows from one signal pin through the protector and out the other signal pin.  No fault current flows through either supply pin.(There will be a few pico-amps of leakage current from each signal pin to each supply pin, but this is independent of fault current.)
During the fault condition, enough current will flow to maintain the output voltage at the fault knee voltage, so the fault current is a function of the output resistance and the supply voltage.  The output voltage and cur-rent have the same polarity as the fault.
The maximum input fault voltage is 40V from the “oppo-site-polarity supply rail.”  This means the input can go to ±35V with ±5V supplies or to ±25V with ±15V sup-plies.  The fault voltage is highest (
±40V) when the sup-plies are off (V+ = V- = 0V).
Using the circuit of Figure 2, the approximate fault cur-rents are as follows:1) For positive faults:
I (F)≈(V+ - 1.3V - V LOW ) ÷R OUT 2) For negative faults:
I (F)≈(V- + 2V + V LOW ) ÷R OUT
where V LOW is the terminating voltage at the far end of R OUT .  V LOW = 0V when R OUT is grounded.
Figure 2.  Application Circuit
M A X 366/M A X 367
Signal-Line Circuit Protectors 6_______________________________________________________________________________________

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