October 1987
Revid January 1999
CD4017BC • CD4022BC Decade Counter/Divider with 10 Decoded Outputs • Divide-by-8 Counter/Divider with 8 Decoded Outputs © 1999 Fairchild Semiconductor Corporation DS005950.prf
CD4017BC • CD4022BC
Decade Counter/Divider with 10 Decoded Outputs •Divide-by-8 Counter/Divider with 8 Decoded Outputs
General Descriptionwest coast
The CD4017BC is a 5-stage divide-by-10 Johnson counter
with 10 decoded outputs and a carry out bit.
The CD4022BC is a 4-stage divide-by-8 Johnson counter
with 8 decoded outputs and a carry-out bit.
The counters are cleared to their zero count by a logical
“1” on their ret line. The counters are advanced on the
positive edge of the clock signal when the clock enable sig-
nal is in the logical “0” state.
ddr1
The configuration of the CD4017BC and CD4022BC per-
mits medium speed operation and assures a hazard free
counting quence. The 10/8 decoded outputs are nor-
mally in the logical “0” state and go to the logical “1” state
only at their respective time slot. Each decoded output
remains high for 1 full clock cycle. The carry-out signal
completes a full cycle for every 10/8 clock input cycles and
is ud as a ripple carry signal to any succeeding stages.
Features
s Wide supply voltage range: 3.0V to 15V
s High noi immunity:0.45 V DD (typ.)
s Low power Fan out of 2 driving 74L
TTL compatibility:or 1 driving 74LS
s Medium speed operation: 5.0 MHz (typ.)
with 10V V DD
s Low power:10 µW (typ.)
s Fully static operation
Applications中秋晚会致辞
•Automotive
•Instrumentation
•Medical electronics
•Alarm systems
•Industrial electronics
•Remote metering
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP, SOIC and SOP
CD4017B
Top View
Pin Assignments for DIP and SOIC
CD4022B
Top View
Order Number Package Number Package Description
CD4017BCM M16A16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
CD4017BCSJ M16D16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4017BCN N16E16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
CD4022BCM M16A16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
CD4022BCN N16E16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
2
C D 4017B C • C D 4022B C
毕业设计英文翻译
Logic Diagrams
CD4017B
Terminal No. 8 = GND Terminal No. 16 = V DD
CD4022B
Terminal No. 16 = V DD Terminal No. 8 = GND
CD4017BC • CD4022BC
Absolute Maximum Ratings (Note 1)
(Note 2)
Recommended Operating Conditions (Note 2)
Note 1: “Absolute Maximum Ratings” are tho values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices should be operated at the limits. The table of “Recom-mended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation.Note 2: V SS = 0V unless otherwi specified.
DC Electrical Characteristics (Note 2)
Note 3: I OL and I OH are tested one output at a time.
DC Supply Voltage (V DD )−0.5 V DC to +18 V DC Input Voltage (V IN )−0.5 V DC to V DD +0.5 V DC
Storage Temperature (T S )−65°C to +150°C
Power Dissipation (P D )Dual-In-Line 700 mW Small Outline 500 mW
Lead Temperature (T L )(Soldering, 10 conds)
260°C DC Supply Voltage (V DD )+3 V DC to +15 V DC
Input Voltage (V IN )
0 to V DD V DC Operating T emperature Range (T A )
−40°C to +85°C
Symbol Parameter
Conditions
−40°C +25°+85°C Units Min
Max Min
Typ Max Min
Max I DD
Quiescent Device V DD = 5V 200.520150µA Current
V DD = 10V 40 1.040300µA V DD = 15V 80 5.080600µA V OL
LOW Level |I O | < 1.0 µA Output Voltage
V DD = 5V 0.0500.050.05V V DD = 10V 0.0500.050.05V V DD = 15V
0.05
00.05
0.05
V V OH
HIGH Level |I O | < 1.0 µA Output Voltage
V DD = 5V 4.95 4.955 4.95V V DD = 10V 9.959.95109.95V V DD = 15V
14.95
14.9515
14.95
V V IL
LOW Level |I O | < 1.0 µA
Input Voltage
V DD = 5V , V O = 0.5V or 4.5V 1.5 1.5 1.5V V DD = 10V , V O = 1.0V or 9.0V 3.0 3.0 3.0V V DD = 15V , V O = 1.5V or 13.5V
4.0
4.0 4.0
V V IH
HIGH Level |I O | < 1.0 µA
Input Voltage
V DD = 5V , V O = 0.5V or 4.5V 3.5 3.5 3.5V V DD = 10V , V O = 1.0V or 9.0V 7.07.07.0V V DD = 15V , V O = 1.5V or 13.5V
11.011.011.0
V I OL
LOW Level Output V DD = 5V , V O = 0.4V 0.520.440.880.36mA Current (Note 3)
V DD = 10V , V O = 0.5V 1.3 1.1 2.250.9mA V DD = 15V , V O = 1.5V 3.6 3.08.8 2.4mA I OH
HIGH Level Output V DD = 5V , V O = 4.6V −0.2−0.16−0.36−0.12mA Current (Note 3)
V DD = 10V , V O = 9.5V −0.5−0.4−0.9−0.3mA V DD = 15V , V O = 13.5V −1.4
−1.2−3.5−1.0nickcarter
mA
I IN
Input Current
V DD = 15V , V IN = 0V −0.3−10−5−0.3−1.0µA V DD = 15V , V IN = 15V
0.3
10−5
0.3
1.0
µA
4
C D 4017B C • C D 4022B C
AC Electrical Characteristics (Note 4)
T A = 25°C, C L = 50 pF , R L = 200k, t rCL and t fCL = 20 ns, unless otherwi specified Note 4: AC Parameters are guaranteed by DC correlated testing.
AC Electrical Characteristics (Note 4)
T A = 25°C, C L = 50 pF , R L = 200k, t rCL and t fCL = 20 ns, unless otherwi specified
Symbol
Parameter Conditions Min Typ Max Units
CLOCK OPERATION
t PHL, t PLH Propagation Delay Time Carry Out Line
V DD = 5V 415800ns V DD = 10V 160320ns V DD = 15V
130250ns Carry Out Line
V DD = 5V C L = 15 pF
240
480ns V DD = 10V 85170ns V DD = 15V
70140ns Decode Out Lines
V DD = 5V 5001000ns V DD = 10V 200400ns V DD = 15V
160320ns t TLH , t THL Transition Time Carry Out and Decode Out Lines
t TLH英语故事视频
V DD = 5V 200360ns V DD = 10V 100180ns V DD = 15V
80130ns t THL
V DD = 5V 100200ns V DD = 10V 50100ns V DD = 15V
40
80
ns f CL
sopa
Maximum Clock Frequency
V DD = 5V Measured with 1.02MHz V DD = 10V Respect to Carry 2.55MHz V DD = 15V
Output Line
3.0
6MHz
t WL , t WH
Minimum Clock Pul Width
V DD = 5V 125250ns V DD = 10V 4590ns V DD = 15V
35
70ns t rCL , t fCL
Clock Ri and Fall Time
V DD = 5V 20µs V DD = 10V 15µs V DD = 15V
5
µs t SU
Minimum Clock Inhibit Data Setup Time
V DD = 5V 120240ns V DD = 10V 4080ns V DD = 15V
3265ns C IN
Average Input Capacitance
5
7.5
pF
Symbol Parameter
Conditions
Min
Typ
Max
Units
RESET OPERATION t PHL, tPLH甲烷的物理性质
Propagation Delay Time Carry Out Line
V DD = 5V 415800ns V DD = 10V 160320ns V DD = 15V
英语专业网130250ns Carry Out Line
V DD = 5V 240480ns V DD = 10V C L = 15 pF
85170ns V DD = 15V
70140ns Decode Out Lines
V DD = 5V 5001000ns V DD = 10V 200400ns V DD = 15V
160320ns t W
Minimum Ret V DD = 5V 200400ns Pul Width
V DD = 10V 70140ns V DD = 15V 55110ns t REM
Minimum Ret V DD = 5V 75150ns Removal Time
V DD = 10V 3060ns V DD = 15V
25
daum50
ns
CD4017BC • CD4022BC
Timing Diagrams
CD4017B
CD4022B
