ATMEL Crypto Memory Specification
Detailed Specification for:
AT88SC0104C
AT88SC0204C
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AT88SC0404C
AT88SC0808C
AT88SC1616C
AT88SC3216C
AT88SC6416C
AT88SC12816C
AT88SC25616C
Cryptographic description included
The included specifications contain Atmel Confidential information and are distributed only under NDA. This specification is not to be copied or distributed beyond the assigned individual/corporation without the written connt of Atmel.
Revision 1.00: 1 October 2003
Table of Contents
●Pin Configuration
●Description
●Protocol Selection
●Ur Memory
●Configuration Memory
●Security Fus
●Communication Security Modes
●Security Methodology
●Security features
●Asynchronous T=0 Modes
●Synchronous Protocol
●Absolute Maximum Ratings
●DC and AC Characteristics Operation
●Tamper Detection Limits
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only child●Cryptographic Block每日
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●Cryptographic Functions
●Appendix
Pin Configuration
The entire Crypto Memory family is available in ISO 7816 compliant modules. 8-pin PDIP , 8-pin SOIC and 8-pin LAP packages. The pin
uuvconfiguration for the packages is the same for all memory densities and
服装设计图片shown in the table below.
Description
The Crypto Memory family is a high performance cure memory currently providing.1K to 256K bits ur memory with advanced curity and cryptographic features build in. the ur memory is divided into 4,8 or 16 zones of which may be individually t with different cure access rights or combined together to provide space for one or multiple data files.
Smart card applications
Crypto Memory offers the ability to communicate with virtually any smart card reader using the asynchronous T=0 protocol defined in ISO 7816-3. For devices with 32K bits of ur memory and larger communication speeds up to 153,600 baud are supported by utilizing ISO 7816-3 Protocol and Parameter Selection. All Crypto Memory devices in smart card module form will also communicate using a synchronous 2-wire rial interface.英语学习音标
Embedded Applications.
Crypto Memory is available industry standard 8-lead packages with the same family pinout as 2-wire rial EEPROM’s supporting only synchronous communications protocol.
Protocol Selection
• Smart Card Applications:
The asynchronous T = 0 protocol defined by ISO 7816-3 is ud for compatibility with the industry’s standard smart card readers.
• Embedded Applications:
A 2-wire rial interface is ud for fast and efficient communication with logic or controllers. The power-up quence determines which of the two communication protocols will be ud.
Asynchronous
T = 0 Protocol
This power-up quence complies with ISO 7816-3 for a cold ret in smart card applications.
• V CC goes high; RST, I/O-SDA and CLK-SCL are low.
• Set I/O-SDA in receive mode.
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• Provide a clock signal to CLK-SCL.
• RST goes high after 400 clock cycles.
The device will respond with a 64-bit ATR code, including historical bytes to indicate the memory density within the CryptoMemory family. Once the asynchronous mode has been lected, it is not possible to switch to the synchronous mode without powering off the device. Figure2. Asynchronous T = 0 Protocol ( Gemplus Patent )
Synchronous
2-wire Serial Interface
The synchronous mode is the default after powering up V CC due to the internal pull-up on RST. For
embedded applications using CryptoMemory in standard plastic packages, this is the only communication protocol.
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• Power-up V CC, RST goes high also.
• After stable V CC, CLK-SCL and I/O-SDA may be driven.
